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參數資料
| 型號： | MPC880ZP133 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 133 MHz, RISC PROCESSOR, PBGA357 |
| 封裝： | 25 X 25 MM, 1.27 MM PITCH, PLASTIC, MS-034BAK-1, BGA-357 |
| 文件頁數： | 12/92頁 |
| 文件大?。?/td> | 1499K |
| 代理商： | MPC880ZP133 |
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2
MPC885/MPC880 Hardware Specifications
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Overview
1Overview
The MPC885/880 is a versatile single-chip integrated microprocessor and peripheral combination that can
be used in a variety of controller applications and communications and networking systems. The
MPC885/MPC880 provides enhanced ATM functionality, an additional fast Ethernet controller, a USB, and
an encryption block.
Table 1 shows the functionality supported by the members of the MPC885 family.
2Features
The MPC885/880 is comprised of three modules that each use the 32-bit internal bus: a MPC8xx core, a
system integration unit (SIU), and a communications processor module (CPM).
The following list summarizes the key MPC885/880 features:
Embedded MPC8xx core up to 133 MHz
Maximum frequency operation of the external bus is 80 MHz (in 1:1 mode)
— The 133-MHz core frequency supports 2:1 mode only.
— The 66-/80-MHz core frequencies support both the 1:1 and 2:1 modes.
Single-issue, 32-bit core (compatible with the PowerPC architecture definition) with thirty-two
32-bit general-purpose registers (GPRs)
— The core performs branch prediction with conditional prefetch and without conditional
execution.
— 8-Kbyte data cache and 8-Kbyte instruction cache (see Table 1)
– Instruction cache is two-way, set-associative with 256 sets in 2 blocks
– Data cache is two-way, set-associative with 256 sets
– Cache coherency for both instruction and data caches is maintained on 128-bit (4-word)
cache blocks.
– Caches are physically addressed, implement a least recently used (LRU) replacement
algorithm, and are lockable on a cache block basis.
— MMUs with 32-entry TLB, fully associative instruction and data TLBs
— MMUs support multiple page sizes of 4, 16, and 512 Kbytes, and 8 Mbytes; 16 virtual address
spaces and 16 protection groups
— Advanced on-chip emulation debug mode
Provides enhanced ATM functionality found on the MPC862 and MPC866 families and includes
the following:
— Improved operation, administration and maintenance (OAM) support
Table 1. MPC885 Family
Part
Cache
Ethernet
SCC
SMC
USB
ATM Support
Security
Engine
I Cache
D Cache 10BaseT
10/100
MPC885
8 Kbyte
Up to 3
2
3
2
1
Serial ATM and
UTOPIA interface
Yes
MPC880
8 Kbyte
Up to 2
2
1
Serial ATM and
UTOPIA interface
No
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相關代理商/技術參數 |
參數描述 |
|---|---|
| MPC880ZP66 | 功能描述:微處理器 - MPU PQ I HIP6W DUET RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數據總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數據 RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MPC880ZP80 | 功能描述:微處理器 - MPU PQ I HIP6W DUET RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數據總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數據 RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MPC885ADS | 功能描述:開發(fā)板和工具包 - 其他處理器 DUET885 RoHS:否 制造商:Freescale Semiconductor 產品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
| MPC885ADSE | 功能描述:開發(fā)板和工具包 - 其他處理器 DUET885 RoHS:否 制造商:Freescale Semiconductor 產品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
| MPC885CVR133 | 功能描述:微處理器 - MPU 133 MHz 176 MIPS RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數據總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數據 RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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