參數(shù)資料
型號(hào)： MPC8560VT667LC
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 35/36頁(yè)
文件大?。?/td> 0K
描述： IC MPU POWERQUICC III 783-FCPBGA
標(biāo)準(zhǔn)包裝： 36
系列： MPC85xx
處理器類型： 32-位 MPC85xx PowerQUICC III
速度： 667MHz
電壓： 1.2V
安裝類型： 表面貼裝
封裝/外殼： 784-BBGA，F(xiàn)CBGA
供應(yīng)商設(shè)備封裝： 783-FCPBGA（29x29）
包裝： 托盤
配用： MPC8560ADS-BGA-ND - BOARD APPLICATION DEV 8560
8
MPC8560 PowerQUICC III
MOTOROLA
Integrated Communications Processor Product Brief
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
e500 Core Overview
System performance monitor
— Supports eight 32-bit counters that count the occurrence of selected events
— Ability to count up to 512 counter-specific events
— Supports 64 reference events that can be counted on any of the 8 counters
— Supports duration and quantity threshold counting
— Burstiness feature that permits counting of burst events with a programmable time between
bursts
— Triggering and chaining capability
— Ability to generate an interrupt on overflow
System access port
— Uses JTAG interface and a TAP controller to access entire system memory map
— Supports 32-bit accesses to configuration registers
— Supports cache-line burst accesses to main memory
— Supports large block (4-Kbyte) uploads and downloads
— Supports continuous bit streaming of entire block for fast upload and download
IEEE 1149.1-compliant, JTAG boundary scan
783 FC-PBGA package
Part III MPC8560 Architecture Overview
The following sections describe the major functional units of the MPC8560.
3.1
e500 Core Overview
The MPC8560 uses the e500 microprocessor core complex. Both the e500 core and the CPM have an
internal PLL that allows independent optimization of their operating frequencies. The core and CPM
frequencies are derived from either the primary PCI clock input or an external oscillator. For information
regarding the e500 core refer to the following documents:
EREF: A Reference for Motorola Book E and the e500 Core
PowerPC e500 Core Complex Reference Manual
PowerPC e500 Application Binary Interface User's Guide
NOTE
The e500 defines features that are not implemented on the MPC8560. It
also generally defines some features that the MPC8560 implements more
specifically. An understanding of these differences can be critical to ensure
proper operation. These differences are summarized in Section 5.14,
“MPC8560 Implementation Details,” in the MPC8560 PowerQUICC III
Integrated Communications Processor Reference Manual.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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