
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 9
Freescale Semiconductor
125
Package Description
GPOUT[0:5]
N9, N10, P8, N7, R9, N5
O
LVDD
—
cfg_dram_type0/GPOUT6
R8
O
LVDD
5, 9
GPOUT7
N6
O
LVDD
—
Reserved
P1
—
104
Reserved
R6
—
104
Reserved
P6
—
15
Reserved
N4
—
105
FIFO1_RXC2
P5
I
LVDD
104
Reserved
R1
—
104
Reserved
P10
—
105
FIFO1_TXC2
P7
O
LVDD
15
cfg_dram_type1
R10
O
LVDD
5, 9
Three-Speed Ethernet Controller (Gigabit Ethernet 3)
TSEC3_TXD[3:0]
V8, W10, Y10, W7
O
TVDD
5, 9, 29
TSEC3_RXD[3:0]
Y1, W3, W5, W4
TVDD
—
TSEC3_GTX_CLK
W8
O
TVDD
—
TSEC3_RX_CLK
W2
I
TVDD
—
TSEC3_RX_DV
W1
I
TVDD
—
TSEC3_RX_ER
Y2
I
TVDD
—
TSEC3_TX_CLK
V10
I
TVDD
—
TSEC3_TX_EN
V9
O
TVDD
30
TSEC3_TXD[7:4]
AB8, Y7, AA7, Y8
O
TVDD
5, 9, 29
TSEC3_RXD[7:4]
AA1, Y3, AA2, AA4
I
TVDD
—
Reserved
AA5
—
15
TSEC3_COL
Y5
I
TVDD
—
TSEC3_CRS
AA3
I/O
TVDD
31
TSEC3_TX_ER
AB6
O
TVDD
—
DUART
UART_CTS[0:1]
AB3, AC5
I
OVDD
—
UART_RTS[0:1]
AC6, AD7
O
OVDD
—
UART_SIN[0:1]
AB5, AC7
I
OVDD
—
UART_SOUT[0:1]
AB7, AD8
O
OVDD
—
I2C interface
IIC1_SCL
AG22
I/O
OVDD
4, 27
Table 74. MPC8543E Pinout Listing (continued)
Signal
Package Pin Number
Pin Type
Power
Supply
Notes