參數(shù)資料
型號(hào)： MPC8360EZUAJDGA
廠商： Freescale Semiconductor
文件頁數(shù)： 91/102頁
文件大?。?/td> 0K
描述： IC MPU POWERQUICC II PRO 740TBGA
標(biāo)準(zhǔn)包裝： 21
系列： MPC83xx
處理器類型： 32-位 MPC83xx PowerQUICC II Pro
速度： 533MHz
電壓： 1.2V
安裝類型： 表面貼裝
封裝/外殼： 740-LBGA
供應(yīng)商設(shè)備封裝： 740-TBGA（37.5x37.5）
包裝： 托盤
配用： MPC8360EA-MDS-PB-ND - KIT APPLICATION DEV 8360 SYSTEM
MPC8360E-RDK-ND - BOARD REFERENCE DESIGN FOR MPC
MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 5
Freescale Semiconductor
89
Suggested PLL Configurations
The QUICC Engine block VCO frequency is derived from the following equations:
ce_clk = (primary clock input × CEPMF)
÷ (1 + CEPDF)
QE VCO Frequency = ce_clk × VCO divider × (1 + CEPDF)
21.4
Suggested PLL Configurations
To simplify the PLL configurations, the device might be separated into two clock domains. The first domain contains the CSB
PLL and the core PLL. The core PLL is connected serially to the CSB PLL, and has the csb_clk as its input clock. The second
clock domain has the QUICC Engine block PLL. The clock domains are independent, and each of their PLLs are configured
separately. Both of the domains has one common input clock. This table shows suggested PLL configurations for 33 and
66 MHz input clocks and illustrates each of the clock domains separately. Any combination of clock domains setting with same
input clock are valid. Refer to Section 21, “Clocking,” for the appropriate operating frequencies for your device.
Table 76. Suggested PLL Configurations
Conf
No.1
SPMF
CORE
PLL
CEPMF
CEPDF
Input
Clock Freq
(MHz)
CSB Freq
(MHz)
Core Freq
(MHz)
QUICC
Engine
Freq (MHz)
400
(MHz)
533
(MHz)
667
(MHz)
33 MHz CLKIN/PCI_SYNC_IN Options
s1
0100
0000100
33
133
266
—
∞∞
∞
s2
0100
0000101
33
133
333
—
∞∞
∞
s3
0101
0000100
33
166
333
—
∞∞
∞
s4
0101
0000101
33
166
416
—
∞∞
s5
0110
0000100
33
200
400
—
∞∞
∞
s6
0110
0000110
33
200
600
—
∞
s7
0111
0000011
33
233
350
—
∞∞
∞
s8
0111
0000100
33
233
466
—
∞∞
s9
0111
0000101
33
233
583
—
∞
s10
1000
0000011
33
266
400
—
∞∞
∞
s11
1000
0000100
33
266
533
—
∞∞
s12
1000
0000101
33
266
667
—
∞
s13
1001
0000010
33
300
—
∞∞
∞
s14
1001
0000011
33
300
450
—
∞∞
s15
1001
0000100
33
300
600
—
∞
s16
1010
0000010
33
333
—
∞∞
∞
s17
1010
0000011
33
333
500
—
∞∞
s18
1010
0000100
33
333
667
—
∞
c1
01001
0
33
—
300
∞∞
∞
c2
01100
0
33
—
400
∞∞
∞
c3
01110
0
33
—
466
—
∞∞
c4
01111
0
33
—
500
—
∞∞
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MPC8360EZUAJDHA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications
MPC8360EZUAJFGA 制造商:Freescale Semiconductor 功能描述:MPC83XX RISC 32-BIT 0.13UM 533MHZ 1.8V/2.5V/3.3V 740-PIN TBG - Trays
MPC8360EZUAJFHA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications
MPC8360EZUALDGA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications
MPC8360EZUALDHA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications
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