
MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
21
DDR and DDR2 SDRAM
Table 15 provides the current draw characteristics for MVREF. 6.2
DDR and DDR2 SDRAM AC Electrical Characteristics
This section provides the AC electrical characteristics for the DDR and DDR2 SDRAM interface.
6.2.1
DDR and DDR2 SDRAM Input AC Timing Specifications
Table 16 provides the input AC timing specifications for the DDR2 SDRAM when GVDD(typ)=1.8 V. Table 17 provides the input AC timing specifications for the DDR SDRAM when GVDD(typ)=2.5 V. Table 15. Current Draw Characteristics for MVREF
Parameter / Condition
Symbol
Min
Max
Unit
Note
Current draw for MVREF
IMVREF
—
500
μA1
1. The voltage regulator for MVREF must supply up to 500 μA current.
Table 16. DDR2 SDRAM Input AC Timing Specifications for 1.8-V Interface
At recommended operating conditions with GVDD of 1.8 ± 5%.
Parameter
Symbol
Min
Max
Unit
Notes
AC input low voltage
VIL
—MVREF – 0.25
V
AC input high voltage
VIH
MVREF + 0.25
—
V
Table 17. DDR SDRAM Input AC Timing Specifications for 2.5-V Interface
At recommended operating conditions with GVDD of 2.5 ± 5%.
Parameter
Symbol
Min
Max
Unit
Notes
AC input low voltage
VIL
—MVREF – 0.31
V
AC input high voltage
VIH
MVREF + 0.31
—
V