參數(shù)資料
型號(hào)： MPC8323CVRAFDC
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 64/82頁(yè)
文件大?。?/td> 0K
描述： IC MPU PWRQUICC II 516-PBGA
產(chǎn)品培訓(xùn)模塊： MPC8323E PowerQUICC II Pro Processor
標(biāo)準(zhǔn)包裝： 40
系列： MPC83xx
處理器類(lèi)型： 32-位 MPC83xx PowerQUICC II Pro
速度： 333MHz
電壓： 1V
安裝類(lèi)型： 表面貼裝
封裝/外殼： 516-BBGA
供應(yīng)商設(shè)備封裝： 516-FPBGA（27x27）
包裝： 托盤(pán)
配用： MPC8323E-RDB-ND - BOARD REFERENCE DESIGN
MPC8323E PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 4
Freescale Semiconductor
67
Clocking
22.4
System PLL Configuration
The system PLL is controlled by the RCWL[SPMF] parameter. Table 58 shows the multiplication factor
encodings for the system PLL.
NOTE
System PLL VCO frequency = 2 × (CSB frequency) × (System PLL VCO
divider).
The VCO divider needs to be set properly so that the System PLL VCO
frequency is in the range of 300–600 MHz.
As described in Section 22, “Clocking,” the LBCM, DDRCM, and SPMF parameters in the reset
configuration word low and the CFG_CLKIN_DIV configuration input signal select the ratio between the
primary clock input (CLKIN or PCI_CLK) and the internal coherent system bus clock (csb_clk). Table 59
DDR1/DDR2 memory bus frequency (MCLK)2
133
MHz
Local bus frequency (LCLK
n)3
66
MHz
PCI input frequency (CLKIN or PCI_CLK)
66
MHz
1 The CLKIN frequency, RCWL[SPMF], and RCWL[COREPLL] settings must be chosen such that the resulting csb_clk, MCLK,
LCLK[0:2], and
core_clk frequencies do not exceed their respective maximum or minimum operating frequencies.
2 The DDR1/DDR2 data rate is 2× the DDR1/DDR2 memory bus frequency.
3 The local bus frequency is 1/2, 1/4, or 1/8 of the lb_clk frequency (depending on LCRR[CLKDIV]) which is in turn 1× or 2× the
csb_clk frequency (depending on RCWL[LBCM]).
Table 58. System PLL Multiplication Factors
RCWL[SPMF]
System PLL
Multiplication Factor
0000
Reserved
0001
Reserved
0010
× 2
0011
× 3
0100
× 4
0101
× 5
0110
× 6
0111–1111
Reserved
Table 57. Operating Frequencies for PBGA (continued)
Characteristic1
Max Operating Frequency
Unit
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MPC8323CVRAFDCA 制造商:Freescale Semiconductor 功能描述:POWERQUICC, 32 BIT POWER ARCHITECTURE SOC, 333MHZ E300, QE, - Trays
MPC8323CZQADDC 功能描述:微處理器 - MPU 8323 PBGA W/O ENCR RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類(lèi)型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8323CZQADDCA 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Integrated Communications Processor Family Hardware Specifications
MPC8323CZQAFDC 功能描述:微處理器 - MPU 8323 PBGA W/O ENCR RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類(lèi)型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8323CZQAFDCA 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Integrated Communications Processor Family Hardware Specifications
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