參數(shù)資料
型號(hào)： MPC8313VRAGDB
廠(chǎng)商： Freescale Semiconductor
文件頁(yè)數(shù)： 25/99頁(yè)
文件大?。?/td> 0K
描述： MPU POWERQUICC II PRO 516-PBGA
標(biāo)準(zhǔn)包裝： 40
系列： MPC83xx
處理器類(lèi)型： 32-位 MPC83xx PowerQUICC II Pro
速度： 400MHz
電壓： 0.95 V ~ 1.05 V
安裝類(lèi)型： 表面貼裝
封裝/外殼： 516-BBGA 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 516-PBGAPGE（27x27）
包裝： 托盤(pán)
MPC8313E PowerQUICC II Pro Processor Hardware Specifications, Rev. 4
Freescale Semiconductor
31
8.3.4
SGMII AC Timing Specifications
This section describes the SGMII transmit and receive AC timing specifications. Transmitter and receiver
characteristics are measured at the transmitter outputs (TX[n] and TX[n]) or at the receiver inputs (RX[n]
and RX[n]) as depicted in Figure 18, respectively.
8.3.4.1
SGMII Transmit AC Timing Specifications
This table provides the SGMII transmit AC timing targets. A source synchronous clock is not provided.
8.3.4.2
SGMII Receive AC Timing Specifications
This table provides the SGMII receive AC timing specifications. Source synchronous clocking is not
supported. Clock is recovered from the data. Figure 17 shows the SGMII receiver input compliance mask
eye diagram.
Common mode input voltage
VCM
—Vxcorevss
—V
4
Notes:
1. Input must be externally AC-coupled.
2. VRX_DIFFp-p is also referred to as peak to peak input differential voltage
3. VCM_ACp-p is also referred to as peak to peak AC common mode voltage.
4. On-chip termination to XCOREVSS.
Table 34. SGMII Transmit AC Timing Specifications
At recommended operating conditions with XCOREVDD = 1.0 V ± 5%.
Parameter
Symbol
Min
Typ
Max
Unit
Note
Deterministic jitter
JD
—
0.17
UI p-p
Total jitter
JT
—
0.35
UI p-p
Unit interval
UI
799.92
800
800.08
ps
1
VOD fall time (80%–20%)
tfall
50
—
120
ps
VOD rise time (20%–80%)
trise
50
—
120
ps
Note:
1. Each UI is 800 ps ± 100 ppm.
Table 35. SGMII Receive AC Timing Specifications
At recommended operating conditions with XCOREVDD = 1.0 V ± 5%.
Parameter
Symbol
Min
Typ
Max
Unit
Note
Deterministic jitter tolerance
JD
0.37
—
UI p-p
1
Combined deterministic and random jitter tolerance
JDR
0.55
—
UI p-p
1
Sinusoidal jitter tolerance
JSIN
0.1
—
UI p-p
1
Table 33. SGMII DC Receiver Electrical Characteristics (continued)
Parameter
Symbol
Min
Typ
Max
Unit
Note
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