參數(shù)資料
型號： MPC8248
廠商： Motorola, Inc.
英文描述： MPC8272 PowerQUICC II Family Hardware Specifications
中文描述： MPC8272的PowerQUICC II系列硬件規(guī)格
文件頁數(shù)： 30/56頁
文件大?。?/td> 1090K
代理商： MPC8248
30
MPC8272 PowerQUICC II Family Hardware Specifications
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA
Clock Configuration Modes
7.2
PCI Agent Mode
Table 17 and Table 18 show configurations for PCI agent mode. The frequency values listed are for the
purpose of illustration only. Users must select a mode and input bus frequency so that the resulting
configuration does not exceed the frequency rating of the user’s device. Note that in PCI agent mode the
input clock is PCI clock.
1101_001
71.4
100.0
2.5
178.6 250.0
3.5
250.0 350.0
5
35.7
50.0
1101_010
62.5
100.0
2.5
156.3 250.0
4
250.0 400.0
5
31.3
50.0
1101_011
55.6
100.0
2.5
138.9 250.0
4.5
250.0 450.0
5
27.8
50.0
1101_100
50.0
100.0
2.5
125.0 250.0
5
250.0 500.0
5
25.0
50.0
1101_101
62.5
125.0
2
125.0 250.0
3
187.5 375.0
5
25.0
50.0
1101_110
62.5
125.0
2
125.0 250.0
4
250.0 500.0
5
25.0
50.0
1110_000
71.4
100.0
3
214.3 300.0
3.5
250.0 350.0
6
35.7
50.0
1110_001
62.5
100.0
3
187.5 300.0
4
250.0 400.0
6
31.3
50.0
1110_010
55.6
100.0
3
166.7 300.0
4.5
250.0 450.0
6
27.8
50.0
1110_011
50.0
100.0
3
150.0 300.0
5
250.0 500.0
6
25.0
50.0
1110_100
50.0
100.0
3
150.0 300.0
5.5
275.0 550.0
6
25.0
50.0
1100_000
Reserved
1100_001
Reserved
1100_010
Reserved
1
The “l(fā)ow” values are the minimum allowable frequencies for a given clock mode. The minimum bus frequency
guarantees the required minimum CPU operating frequency. Minimum CPU frequency is determined by the clock
mode. For modes with a CPU multiplication factor
≤
3, the minimum CPU frequency is 125 MHz or 150 MHz, as
shown in the table. For modes with a CPU multiplication factor
≥
3.5, the minimum CPU frequency is 250 MHz.
The “high” values are for the purpose of illustration only. Users must select a mode and input bus frequency so
that the resulting configuration does not exceed the frequency rating of the user’s device.
2
PCI_MODCK determines the PCI clock frequency range. Refer to Table 15 for higher range configurations.
3
MODCK_H = hard reset configuration word [28–31] (refer to Section 5.4 in the
MPC8260 User’s Manual
).
MODCK[1-3] = three hardware configuration pins.
4
CPM multiplication factor = CPM clock/bus clock
5
CPU multiplication factor = Core PLL multiplication factor
Table 16. Clock Configurations for PCI Host Mode (PCI_MODCK=1)
1, 2
(continued)
Mode
3
Bus Clock
(MHz)
CPM
Multiplication
Factor
4
CPM Clock
(MHz)
CPU
Multiplication
Factor
5
CPU Clock
(MHz)
PCI
Division
Factor
PCI Clock
(MHz)
MODCK_H-
MODCK[1-3]
Low
High
Low
High
Low
High
Low
High
F
Freescale Semiconductor, Inc.
n
.
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