參數(shù)資料
型號(hào)： MPC5646CF0CLT8
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 80 MHz, MICROCONTROLLER, PQFP208
封裝： 28 X 28 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, MS-026BJB, LQFP-208
文件頁數(shù)： 63/115頁
文件大?。?/td> 783K
代理商： MPC5646CF0CLT8
Electrical Characteristics
MPC5646C Microcontroller Datasheet, Rev. 4
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
51
Table 20. I/O consumption
Symbol
C
Parameter
Conditions1,2
1 V
DD = 3.3 V ± 10% / 5.0 V ± 10%, TA = 40 to 125 °C, unless otherwise specified.
2 V
DD as mentioned in the table is VDD_HV_A/VDD_HV_B.
Value3
3 All values need to be confirmed during device validation.
Unit
Min
Typ
Max
ISWTSLW
,4
4 Stated maximum values represent peak consumption that lasts only a few ns during I/O transition.
CC D Peak I/O current for
SLOW configuration
CL = 25 pF
VDD = 5.0 V ± 10%,
PAD3V5V = 0
——
19.9
mA
VDD = 3.3 V ± 10%,
PAD3V5V = 1
——
15.5
ISWTMED
CC D Peak I/O current for
MEDIUM
configuration
CL = 25 pF
VDD = 5.0 V ± 10%,
PAD3V5V = 0
——
28.8
mA
VDD = 3.3 V ± 10%,
PAD3V5V = 1
——
16.3
ISWTFST
CC D Peak I/O current for
FAST configuration
CL = 25 pF
VDD = 5.0 V ± 10%,
PAD3V5V = 0
—
113.5
mA
VDD = 3.3 V ± 10%,
PAD3V5V = 1
——
52.1
IRMSSLW
CC D Root mean square
I/O current for SLOW
configuration
CL = 25 pF, 2 MHz
VDD = 5.0 V ± 10%,
PAD3V5V = 0
—
2.22
mA
CL = 25 pF, 4 MHz
—
3.13
CL = 100 pF, 2 MHz
—
6.54
CL = 25 pF, 2 MHz
VDD = 3.3 V ± 10%,
PAD3V5V = 1
—
1.51
CL = 25 pF, 4 MHz
—
2.14
CL = 100 pF, 2 MHz
—
4.33
IRMSMED
CC D Root mean square
I/O current for
MEDIUM
configuration
CL = 25 pF, 13 MHz
VDD = 5.0 V ± 10%,
PAD3V5V = 0
——
6.5
mA
CL = 25 pF, 40 MHz
—
13.32
CL = 100 pF, 13 MHz
—
18.26
CL = 25 pF, 13 MHz
VDD = 3.3 V ± 10%,
PAD3V5V = 1
—
4.91
CL = 25 pF, 40 MHz
—
8.47
CL = 100 pF, 13 MHz
—
10.94
IRMSFST
CC D Root mean square
I/O current for FAST
configuration
CL = 25 pF, 40 MHz
VDD = 5.0 V ± 10%,
PAD3V5V = 0
—
21.05 mA
CL = 25 pF, 64 MHz
—
33
CL = 100 pF, 40 MHz
—
55.77
CL = 25 pF, 40 MHz
VDD = 3.3 V ± 10%,
PAD3V5V = 1
——
14
CL = 25 pF, 64 MHz
—
20
CL = 100 pF, 40 MHz
—
34.89
IAVGSEG
SR D Sum of all the static
I/O current within a
supply segment
VDD = 5.0 V ± 10%, PAD3V5V = 0
—
70
mA
VDD = 3.3 V ± 10%, PAD3V5V = 1
—
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