- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄45342 > MPC5607BVLL4 (FREESCALE SEMICONDUCTOR INC) FLASH, 48 MHz, MICROCONTROLLER, PQFP100 PDF資料下載
參數(shù)資料
| 型號(hào)： | MPC5607BVLL4 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | FLASH, 48 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, MS-026 BED, LQFP-100 |
| 文件頁(yè)數(shù)： | 88/106頁(yè) |
| 文件大?。?/td> | 667K |
| 代理商： | MPC5607BVLL4 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)當(dāng)前第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)
MPC5607B
M
icr
ocontr
oller
Data
Sheet,
Re
v
.5
Ele
c
trical
cha
rac
te
ristic
s
Fre
e
scale
Semico
nductor
82
11
tSUO
7
CC D Data valid after SCK edge Master mode
—
32
—
50
ns
Slave mode
—
52
—
160
12
tHO
7
CC D Data hold time for outputs
Master mode
0
—
0
—
ns
Slave mode
8
—
13
—
1 Operating conditions: Cout = 10 to 50 pF, Slew
IN = 3.5 to 15 ns
2 Maximum value is reached when CSn pad is configured as SLOW pad while SCK pad is configured as MEDIUM. A positive value means that SCK
starts before CSn is asserted. DSPI2 has only SLOW SCK available.
3 Maximum value is reached when CSn pad is configured as MEDIUM pad while SCK pad is configured as SLOW. A positive value means that CSn is
deasserted before SCK. DSPI0 and DSPI1 have only MEDIUM SCK available.
4 The t
CSC delay value is configurable through a register. When configuring tCSC (using PCSSCK and CSSCK fields in DSPI_CTARx registers), delay
between internal CS and internal SCK must be higher than
t
CSC to ensure positive tCSCext.
5 The t
ASC delay value is configurable through a register. When configuring tASC (using PASC and ASC fields in DSPI_CTARx registers), delay between
internal CS and internal SCK must be higher than
t
ASC to ensure positive tASCext.
6 This delay value corresponds to SMPL_PT = 00b which is bit field 9 and 8 of DSPI_MCR register.
7 SCK and SOUT are configured as MEDIUM pad.
Table 44. DSPI characteristics1 (continued)
No.
Symbol
C
Parameter
DSPI0/DSPI1/DSPI5/DSPI6
DSPI2/DSPI4
Unit
Min
Typ
Max
Min
Typ
Max
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MPC5607BVLQ6R | FLASH, 64 MHz, MICROCONTROLLER, PQFP144 |
| MPC5607BF0CLU6R | 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP176 |
| MPC5607BF0MLU4 | 32-BIT, FLASH, 48 MHz, MICROCONTROLLER, PQFP176 |
| MPC5607BF0MLU6 | 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP176 |
| MPC5607BF0VLU6 | 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP176 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC5607CECLLR | 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:Microcontroller |
| MPC5607CECLQR | 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:Microcontroller |
| MPC5607CECLUR | 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:Microcontroller |
| MPC5607CEMLLR | 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:Microcontroller |
| MPC5607CEMLQR | 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:Microcontroller |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。