參數(shù)資料
    型號: MPC5607BF0AVMG4R
    廠商: FREESCALE SEMICONDUCTOR INC
    元件分類: 微控制器/微處理器
    英文描述: 32-BIT, FLASH, 48 MHz, MICROCONTROLLER, PBGA208
    封裝: 17 X 17 MM, 1 MM PITCH, MO-152AAF-1, ROHS COMPLIANT, MAPBGA-208
    文件頁數(shù): 85/110頁
    文件大?。?/td> 907K
    代理商: MPC5607BF0AVMG4R
    MPC5607B Microcontroller Data Sheet, Rev. 6
    Electrical characteristics
    Freescale Semiconductor
    76
    Figure 18. Input equivalent circuit (extended channels)
    A second aspect involving the capacitance network shall be considered. Assuming the three capacitances CF, CP1 and CP2 are
    initially charged at the source voltage VA (refer to the equivalent circuit reported in Figure 17): A charge sharing phenomenon
    is installed when the sampling phase is started (A/D switch close).
    Figure 19. Transient behavior during sampling phase
    In particular two different transient periods can be distinguished:
    1. A first and quick charge transfer from the internal capacitance CP1 and CP2 to the sampling capacitance CS occurs (CS
    is supposed initially completely discharged): considering a worst case (since the time constant in reality would be
    faster) in which CP2 is reported in parallel to CP1 (call CP = CP1 + CP2), the two capacitances CP and CS are in series,
    and the time constant is
    RF
    CF
    RS
    RL
    RSW1
    CP3
    CS
    VDD
    Sampling
    Source
    Filter
    Current Limiter
    EXTERNAL CIRCUIT
    INTERNAL CIRCUIT SCHEME
    RS
    Source Impedance
    RF
    Filter Resistance
    CF
    Filter Capacitance
    RL
    Current Limiter Resistance
    RSW Channel Selection Switch Impedance (two contributions RSW1 and RSW2)
    RAD Sampling Switch Impedance
    CP
    Pin Capacitance (three contributions, CP1, CP2 and CP3)
    CS
    Sampling Capacitance
    CP1
    RAD
    Channel
    Selection
    VA
    CP2
    Extended
    RSW2
    Switch
    VA
    VA1
    VA2
    t
    TS
    VCS
    Voltage Transient on CS
    V <0.5 LSB
    1
    2
    1 < (RSW + RAD) CS << tS
    2 = RL (CS + CP1 + CP2)
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