參數資料
型號： MPC5534AVZ80R2
廠商： 飛思卡爾半導體(中國)有限公司
英文描述： Microcontroller
中文描述： 微控制器
文件頁數： 22/50頁
文件大?。?/td> 1148K
代理商： MPC5534AVZ80R2
MPC5534 Microcontroller Data Sheet, Rev. 0
Preliminary—Subject to Change Without Notice
Electrical Characteristics
Freescale Semiconductor
22
3.11
H7Fb Flash Memory Electrical Characteristics
Table 14. Flash Program and Erase Specifications
1
Table 16
shows the FLASH_BIU settings versus frequency of operation. Refer to the device Reference
Manual for definitions of these bit-fields.
1
Typical program and erase times assume nominal supply values and operation at 25
o
C.
2
Initial factory condition:
≤
100
program/erase cycles, 25
o
C, typical supply voltage, 80MHz minimum system frequency.
3
The maximum erase time occurs after the specified number of program/erase cycles. This maximum value is characterized
but not guaranteed.
4
Actual hardware programming times. This does not include software overhead.
5
Page size is 128 bits (4 words).
6
Read frequency of the flash can be up to the maximum operating frequency of the device. There is no minimum read frequency
condition.
Num
Symbol
Min
Typ
Initial
Max
2
Max
3
Unit
3
Double Word (64 bits) Program Time
4
Page Program Time
4
T
dwprogram
T
pprogram
T
16kpperase
T
48kpperase
T
64kpperase
T
128kpperase
—
—
10
—
44
5
500
μ
s
4
—
22
500
μ
s
7
16 Kbyte Block Pre-program and Erase Time
—
265
400
5000
ms
9
48 Kbyte Block Pre-program and Erase Time
—
340
400
5000
ms
10
64 Kbyte Block Pre-program and Erase Time
—
400
500
5000
ms
8
128 Kbyte Block Pre-program and Erase Time
—
500
1250
15,000
ms
11
Minimum operating frequency for program and erase
operations
6
25
—
—
—
MHz
Table 15. Flash EEPROM Module Life (Full Temperature Range)
Num
Characteristic
Symbol
Min
Typical
1
1
Typical endurance is evaluated at 25C. Product qualification is performed to the minimum specification. For additional
information on the Freescale definition of Typical Endurance, please refer to Engineering Bulletin EB619 “Typical Endurance
for Nonvolatile Memory.”
Unit
1a
Number of Program/Erase cycles per block for 16 Kbyte, 48 Kbyte, and 64
Kbyte blocks over the operating temperature range (T
J
)
Number of Program/Erase cycles per block for 128 Kbyte blocks over the
operating temperature range (T
J
)
Data retention
Blocks with 0 – 1,000 P/E cycles
Blocks with 1,001 – 100,000 P/E cycles
P/E
100,000
—
cycles
1b
P/E
10,000
100,000
cycles
2
Retention
20
5
—
years
Table 16. FLASH_BIU Settings vs. Frequency of Operation
1
Target
2
Maximum
Frequency (MHz)
APC
RWSC
WWSC
DPFEN
IPFEN
PFLIM
BFEN
up to and including 25 MHz
3
0b000
0b000
0b01
0b0, 0b1
4
0b0, 0b1
4
0b00-
0b1x
5
0b0, 0b1
6
up to and including 50 MHz
0b001
0b001
0b01
0b0, 0b1
4
0b0, 0b1
4
0b00-
0b1x
5
0b0, 0b1
6
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