參數(shù)資料
型號: MPAD
廠商: Mitel Networks Corporation
英文描述: Quadrature Downconverter
中文描述: 正交下變頻器
文件頁數(shù): 3/12頁
文件大?。?/td> 508K
代理商: MPAD
3
SL1710
ELECTRICAL CHARACTERISTICS (continued)
Tamb= 0oC to 80oC, Vee= 0V, Vcc = 4.75 to 5.25 V, These characteristics are guaranteed by either production test or design.
They apply within the specified ambient temperature and supply voltage unless otherwise stated.
Value
Typ
-50
30
Characteristic
Prescaler sidebands
Power supply rejection
Pin
2, 7
2, 7
Min
Max
-47
Units
dBV
dB
Conditions
Measured in IQ outputs
Attenuation VCC to IQ outputs,
over 0-500kHz
25
Notes:
1. The choice of L will have an effect on phase noise of the VCO
2. Target value at fo=500MHz, L (tank)=10nH, Q (tank, unloaded)=50, SSB
DESCRIPTION
The SL1710 is a quadrature downconverter, intended for
high linearity, low noise digital satellite applications. It contains
all the elements necessary, with the exception of the VCO
tuning components, to extract baseband I and Q signals from
a QPSK or QAM IF input signal.
A block diagram for the SL1710 is shown in Fig. 2.
In normal consumer digital satellite applications, the device
is fed via a SAW filter, centred at the standard IF of 479.5MHz.
A filtered single channel is therefore presented to the device,
at a typical level of -51dBV. An AGC is included with 18dB of
gain control, which is guaranteed to provide an overall conver-
sion gain between 30 and 45dB from the RF input to the I and
Q outputs.
The quadrature mixers are fed from an on-chip oscillator
which is centred on the incoming IF. The oscillator external
tuning network should be fully symmetric, to ensure optimum
gain and phase match.
Single ended I and Q amplifiers are provided, which output
a 760mV (p/p) signal, assuming a nominal -51dBV input signal
and 40dB gain, suitable for driving a dual channel ADC such as
the PCA 869, PCA 913 and PCA 916 via an anti-alias filter (see
application notes). The ADC is normally AC coupled via two
capacitors (typically 4.7
μ
F).
The SL1710 also includes divide by 32 prescaler output.
These may be fed to an external PLL circuit which can be used
to drive the on-chip oscillator, thus forming a complete control
loop.
The VCO can be disabled by applying 0V to pin 15.
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