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參數(shù)資料
| 型號： | MN673273 |
| 廠商： | PANASONIC CORP |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | Signal-Processing LSI for Multimedia Camera |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP80 |
| 封裝： | 12 X 12 MM, PLASTIC, QFH-80 |
| 文件頁數(shù)： | 7/13頁 |
| 文件大?。?/td> | 506K |
| 代理商： | MN673273 |
LSIs for Video Camera
MN673273
7
I
Electrical Characteristics
1. Absoluste Maximum Ratings
Parameter
Symbol
Rating
Unit
Supply voltage(digital)
V
DD
0.3 to
+
4.6
0.3 to
+
4.6
0.3 to V
DD
+
0.3
0.3 to V
DD
+
0.3
±
3
±
6
±
12
±
48
20 to
+
85
55 to
+
150
V
Supply voltage(analog)
AV
DD
V
Input voltage
V
I
V
Output voltage
V
O
V
Average output
1 mA cell
I
O
mA
voltages
2 mA cell
4 mA cell
16 mA cell
Operating temperature
T
opr
°
C
°
C
Storage temperature
T
stg
Notes: 1. The absolute maximum ratings are limiting values under which the chip will not be destroyed. Operation is not
guaranteed within these ranges.
2. The VDD1, VDD2, VDD3, VDDTG, ADVDD1, and DAAVDD2 pins must always be held at the same voltage.
The VSS1, VSS2, VSS3, VSSTG, ADVSS1, and DAAVSS2 pins must always be held at the same voltage.
2. Operating Conditions
V
SS
=
AV
SS
=
0 V
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Supply voltage(digital)
V
DD
Digital system power supply
3.0
3.3
3.6
V
Supply voltage(analog)
AV
DD
V
DDH
A/D and D/A converter power supply
3.0
3.3
3.6
V
Supply voltage(R, H1, H2)
Drive power supply for the R, H1,
and H2 output pins
3.0
3.3
3.6
V
Operating frequency
f
CLK
duty 50 %
9.5
20.0
MHz
3. DC Characteristics
V
DDH
=
3.0 V to 3.6 V, V
DD
=
AV
DD
=
3.0 V to 3.6 V, V
SS
=
AV
SS
=
0 V, T
a
=
20
°
C to
+
85
°
C
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Operating supply current
I
DD
V
DD
=
AV
DD
=
V
DDH
=
3.6 V,
f
CLK
=
20.0 MHz, T
a
=
25
°
C
100
180
mA
Input pins1-1 TEST5, CLKRST, BLCSW, RESET, MINTEST, TESTSCAN
Input voltage
High-level
V
IH
V
DD
×
0.8
V
DD
V
Low-level
V
IL
0
V
DD
×
0.2
Input leakage current
I
LI
V
I
=
V
DD
or V
SS
5
5
μ
A
Input pins1-2 Pull-down Input pins TEST1 to TEST4, HSSFIX, MS, DO
Input voltage
High-level
V
IH
V
DD
×
0.8
V
DD
V
Low-level
V
IL
0
V
DD
×
0.2
Input leakage current
I
LIPD
V
I
=
V
SS
V
I
=
V
DD
10
10
μ
A
k
Pull-down resistor
R
PD
10
30
90
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