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參數(shù)資料
| 型號： | MM54HCT03J |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Quad 2-Input NAND Gate (Open Drain) |
| 中文描述： | HCT SERIES, QUAD 2-INPUT NAND GATE, CDIP14 |
| 封裝： | CERAMIC, DIP-14 |
| 文件頁數(shù)： | 2/4頁 |
| 文件大?。?/td> | 113K |
| 代理商： | MM54HCT03J |
Absolute Maximum Ratings
(Notes 1 & 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (V
CC
)
DC Input Voltage (V
IN
)
DC Output Voltage (V
OUT
)
Clamp Diode Current (I
IK
, I
OK
)
DC Output Current, per Pin (I
OUT
)
DC V
CC
or GND Current, per Pin (I
CC
)
Storage Temperature Range (T
STG
)
Power Dissipation (P
D
)
(Note 3)
S.O. Package only
b
0.5V to
a
7.0V
b
1.5V to V
CC
a
1.5V
b
0.5V to V
CC
a
0.5V
g
20 mA
g
25 mA
g
50 mA
b
65
§
C to
a
150
§
C
600 mW
500 mW
Lead Temperature (T
L
)
(Soldering, 10 seconds)
260
§
C
Operating Conditions
Min
4.5
Max
5.5
Units
V
Supply Voltage (V
CC
)
DC Input or Output Voltage
(V
IN
, V
OUT
)
Operating Temperature Range (T
A
)
MM74HCT
MM54HCT
0
V
CC
V
b
40
b
55
a
85
a
125
§
C
§
C
Input Rise or Fall Times
(t
r
, t
f
)
500
ns
DC Electrical Characteristics
V
CC
e
5V
g
10% (unless otherwise specified)
T
A
e
25
§
C
74HCT
54HCT
Symbol
Parameter
Conditions
T
A
eb
40
§
C to
a
85
§
C T
A
eb
55
§
C to
a
125
§
C Units
Typ
Guaranteed Limits
V
IH
Minimum High Level
Input Voltage
2.0
2.0
2.0
V
V
IL
Maximum Low Level
Input Voltage
0.8
0.8
0.8
V
V
OL
Maximum Low Level
Voltage
V
IN
e
V
IH
l
I
OUT
l
e
20
m
A
l
I
OUT
l
e
4.0 mA, V
CC
e
4.5V 0.2
l
I
OUT
l
e
4.8 mA, V
CC
e
5.5V 0.2
V
IN
e
V
CC
or GND,
V
IH
or V
IL
0
0.1
0.26
0.26
0.1
0.33
0.33
0.1
0.4
0.4
V
V
V
I
IN
Maximum Input
Current
g
0.1
g
1.0
g
1.0
m
A
I
LKG
Minimum High Level
Output Leakage Current V
OUT
e
V
CC
V
IN
e
V
IH
or V
IL
,
0.5
5.0
10
m
A
I
CC
Maximum Quiescent
Supply Current
V
IN
e
V
CC
or GND
I
OUT
e
0
m
A
2.0
20
40
m
A
V
IN
e
2.4V or 0.5V (Note 4)
1.2
1.4
1.5
mA
Note 1:
Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Note 2:
Unless otherwise specified all voltages are referenced to ground.
Note 3:
Power Dissipation temperature derating D plastic ‘‘N’’ package:
b
12 mW/
§
C from 65
§
C to 85
§
C; ceramic ‘‘J’’ package;
b
12 mW/
§
C from 100
§
C to 125
§
C.
Note 4:
This is measured per input with all other inputs held at V
CC
or ground.
2
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