- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄382333 > MM54HC646 (National Semiconductor Corporation) Non-Inverting Octal Bus Transceiver/Registers PDF資料下載
參數(shù)資料
| 型號(hào)： | MM54HC646 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Non-Inverting Octal Bus Transceiver/Registers |
| 中文描述： | 非反相八路總線收發(fā)器/寄存器 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 198K |
| 代理商： | MM54HC646 |
TL/F/5345
M
M
January 1988
MM54HC646/MM74HC646 Non-Inverting
Octal Bus Transceiver/Registers
MM54HC648/MM74HC648
Inverting Octal Bus Transceiver/Registers
General Description
These transceivers utilize advanced silicon-gate CMOS
technology, and contain two sets of TRI-STATE
é
outputs,
two sets of D-type flip-flops, and control circuitry designed
for high speed multiplexed transmission of data.
Six control inputs enable this device to be used as a latched
transceiver, unlatched transceiver, or a combination of both.
As a latched transceiver, data from one bus is stored for
later retrieval by the other bus. Alternately real time bus
data (unlatched) may be directly transferred from one bus to
another.
Circuit operation is determined by the G, DIR, CAB, CBA,
SAB, SBA control inputs. The enable input, G, controls
whether any bus outputs are enabled. The direction control,
DIR, determines which bus is enabled, and hence the direc-
tion data flows: The SAB, SBA inputs control whether the
latched data (stored in D type flip flops), or the bus data
(from other bus input pins) is transferred. Each set of flip-
flops has its own clock CAB, and CBA, for storing data. Data
is latched on the rising edge of the clock.
Each output can drive up to 15 low power Schottky TTL
loads. These devices are functionally and pin compatible to
their LS-TTL counterparts. All inputs are protected from
damage due to static discharge by diodes to V
CC
and
ground.
Features
Y
Typical propagation delay: 14 ns
Y
TRI-STATE outputs
Y
Bidirectional communication
Y
Wide power supply range: 2–6V
Y
Low quiescent supply current: 160
m
A
maximum (74HC)
Y
High output current: 6 mA (74HC)
Connection Diagram
Dual-In-Line Package
TL/F/5345–2
Order Number MM54HC646/648 or
MM74HC646/648
TL/F/5345–1
Real-Time Transfer
Bus B to Bus A
Real-Time Transfer
Bus A to Bus B
Storage from
A, B, or A and B
Transfer Stored Data
to A or B
TRI-STATE
é
is a registered trademark of National Semiconductor Corp.
C
1995 National Semiconductor Corporation
RRD-B30M105/Printed in U. S. A.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MM54HC648 | Non-Inverting Octal Bus Transceiver/Registers |
| MM74HC646 | Non-Inverting Octal Bus Transceiver/Registers |
| MM74HC648 | Non-Inverting Octal Bus Transceiver/Registers |
| MM54HCT03 | Quad 2-Input NAND Gate (Open Drain) |
| MM54HCT03J | Quad 2-Input NAND Gate (Open Drain) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MM54HC646 WAF | 制造商:Texas Instruments 功能描述: |
| MM54HC648 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Non-Inverting Octal Bus Transceiver/Registers |
| MM54HC648 WAF | 制造商:Texas Instruments 功能描述: |
| MM54HC688E/883 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
| MM54HC688J | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。