參數(shù)資料
型號(hào): MM54C175
廠商: National Semiconductor Corporation
英文描述: Quad D Flip-Flop(四路D觸發(fā)器)
中文描述: 四D觸發(fā)器(四路?觸發(fā)器)
文件頁(yè)數(shù): 1/6頁(yè)
文件大小: 114K
代理商: MM54C175
TL/F/5900
M
February 1988
MM54C175/MM74C175 Quad D Flip-Flop
General Description
The MM54C175/MM74C175 consists of four positive-edge
triggered D type flip-flops implemented with monolithic
CMOS technology. Both are true and complemented out-
puts from each flip-flop are externally available. All four flip-
flops are controlled by a common clock and a common
clear. Information at the D inputs meeting the set-up time
requirements is transferred to the Q outputs on the positive-
going edge of the clock pulse. The clearing operation, en-
abled by a negative pulse at Clear input, clears all four Q
outputs to logical ‘‘0’’ and Q’s to logical ‘‘1’’.
All inputs are protected from static discharge by diode
clamps to V
CC
and GND.
Features
Y
Wide supply voltage range
3V to 15V
Y
Guaranteed noise margin
1.0V
Y
High noise immunity
0.45 V
CC
(typ.)
Fan out of 2
driving 74L
Y
Low power TTL compatibility
Connection Diagram & Truth Table
Dual-In-Line Package
TL/F/5900–1
Top View
Order Number MM54C175 or MM74C175
Each Flip-Flop
Inputs
Outputs
Clear
Clock
D
Q
Q
L
H
H
H
H
X
u
u
H
L
X
H
L
X
X
L
H
L
NC
NC
H
L
H
NC
NC
H
e
High level
L
e
Low level
X
e
Irrelevant
u
e
Transition from low to high level
NC
e
No change
C
1995 National Semiconductor Corporation
RRD-B30M105/Printed in U. S. A.
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