Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Voltage at Any Pin
V
SS
to V
SS
a
10V
b
40
§
C to
a
85
§
C
b
65
§
C to
a
150
§
C
Operating Temperature
Storage Temperature
Power Dissipation
300 mW at
a
85
§
C
350 mW at
a
25
§
C
Junction Temperature
a
150
§
C
Lead Temperature
(Soldering, 10 seconds)
300
§
C
DC Electrical Characteristics
T
A
within operating range, V
DD
e
3.0V to 10V, V
SS
e
0V, unless otherwise specified
Parameter
Conditions
Min
Typ
Max
Units
Power Supply
3.0
10
V
Power Supply Current
R
e
1M, C
e
470 pF,
Outputs Open
V
DD
e
3.0V
V
DD
e
5.0V
V
DD
e
10.0V
OSC
e
0V, Outputs Open,
BPIN
e
32 Hz, V
DD
e
3.0V
9
15
25
45
m
A
m
A
m
A
17
35
1.5
2.5
m
A
Input Voltage Levels
Logic ‘‘0’’
Logic ‘‘1’’
Logic ‘‘0’’
Logic ‘‘1’’
Load, Clock, Data
V
DD
e
5.0V
V
DD
e
5.0V
V
DD
e
3.0V
V
DD
e
3.0V
0.9
V
V
V
V
2.4
0.4
2.0
Output Current Levels
Segments and Data Out
Sink
Source
V
DD
e
3.0V, V
OUT
e
0.3V
V
DD
e
3.0V, V
OUT
e
2.7V
20
20
m
A
m
A
BP OUT
Sink
Source
V
DD
e
3.0V, V
OUT
e
0.3V
V
DD
e
3.0V, V
OUT
e
2.7V
320
320
m
A
m
A
AC Electrical Characteristics
V
DD
t
4.7V, V
SS
e
0V unless otherwise specified
Symbol
Parameter
Min
Typ
Max
Units
f
C
Clock Frequency, V
DD
e
3V
500
kHz
t
CH
Clock Period High
(Notes 1, 2)
500
ns
t
CL
Clock Period Low
500
ns
t
DS
Data Set-Up before Clock
300
ns
t
DH
Data Hold Time after Clock
100
ns
t
LW
Minimum Load Pulse Width
500
ns
t
LTC
Load to Clock
400
ns
t
CDO
Clock to Data Valid
400
750
ns
Note 1:
AC input waveform specification for test purpose: t
r
s
20 ns, t
f
s
20 ns, f
e
500 kHz, 50%
g
10% duty cycle.
Note 2:
Clock input rise and fall times must not exceed 300 ns.
Note 3:
Output offset voltage is
g
50 mV with C
SEGMENT
e
250 pF, C
BP
e
8750 pF.
Functional Description
A block diagram for the MM5483 is shown inFigure 1 and a
package pinout is shown inFigure 2.Figure 3 shows a pos-
sible 3-wire connection system with a typical signal format
for Figure 3. Shown in Figure 4, the load input is an asyn-
chronous input and lets data through from the shift register
to the output buffers any time it is high. The load input can
be connected to V
DD
for 2-wire control as shown in Figure
5. In the 2-wire control mode, 31 bits (or less depending on
the number of segments used) of data are clocked into the
MM5483 in a short time frame (with less than 0.1 second
there probably will be no noticeable flicker) with no more
clocks until new information is to be displayed. If data was
slowly clocked in, it can be seen to ‘‘walk’’ across the dis-
play in the 2-wire mode. An AC timing diagram can be seen
in Figure 6. It should be noted that data out is not a TTL-
compatible output.
2