參數(shù)資料
型號(hào): MM1495XD
廠商: MITSUMI ELECTRIC CO LTD
元件分類: 運(yùn)動(dòng)控制電子
英文描述: I2C BUS Control 5-Input 2-Output AV Switch Monolithic IC
中文描述: 5-CHANNEL, AUDIO/VIDEO SWITCH, PDIP42
封裝: SDIP-42
文件頁(yè)數(shù): 17/19頁(yè)
文件大?。?/td> 468K
代理商: MM1495XD
MITSUMI
I
2
C BUS Control 5-Input 2-Output AV Switch MM1495X
Bus data
Sync sepa select
b21
1
0
1
1
0
1
0
0
Mode
Output
b22
1
1
0
0
0
1
1
0
b20
0
0
1
0
0
1
1
1
S2
S1
V2
V1
TV
V
OUT
2
V
OUT
1
Y
OUT
Y/V
IN
S2
Y/V
IN
S1
V
IN
V2
V
IN
V1
V
IN
TV
V
OUT
2
V
OUT
1
Y
OUT
Video
input
Video
output
Mode
Bus data
Output port switching
b26
b25
*
*
*
0
1
*
Port
Condition
Open
Low
Open
Low
Open
Low
Open
Low
Open
Low
b27
*
*
*
*
0
1
b24
*
0
1
*
*
*
b23
0
1
*
*
*
*
I/O1
*
*
0
1
*
*
I/O2
I/O3
O4
O5
Sync sepa select
Output port switching
[Status registers]
Status registers are data to inform the master of the device status.
The data format is set as shown in the following figure.
Out of the Address byte, first 7bit are assigned to the slave address, while the residual 1bit is assigned to the
R/W bit.
Set the R/W bit to 1 when data are used status registers.
As MM1495 slave address, either 91H or 93H can be selected according to the ADR terminal conditions.
When ADR terminal is L, 91H is selected.
Set the confirmation acknowledgement after the end of status register to non-acknowledgement.
The following figure shows the correspondence of the output data of status registers.
S
Slave address
0
1
R/W
1
A
Status register
NA
P
1
0
0
0
0/1
b37 b36 b35 b34 b33 b32 b31 b30
Address byte
device status
b37
b36
b35
Input port detect
b34
b33
b32
b31
b30
S detect
I/O3 Low I/O3 High I/O2 Low I/O2 High I/O1 Low I/O1 High
C
IN
S2
C
IN
S1
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