參數(shù)資料
型號: ML9203-XXGA
廠商: LAPIS SEMICONDUCTOR CO LTD
元件分類: 顯示控制器
英文描述: 16 X 35 DOTS FLUORESCENT DSPL CTRL, PQFP100
封裝: 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100
文件頁數(shù): 9/33頁
文件大?。?/td> 289K
代理商: ML9203-XXGA
FEDL9203-01
1Semiconductor
ML9203-xx
16/32
2, A. CGRAM data write
(Specifies the addresses of CGRAM and writes character pattern data.)
CGRAM (Character Generator RAM) has a 4-bit address to store 5
× 7 dot matrix character patterns.
A character pattern stored in CGRAM can be displayed by specifying the character code (address) by DCROM.
The address of CGRAM is assigned to 00H to 0FH. (All the other addresses are the CGROM addresses. See the
ROM code table for more details.)
The CGRAM can store 16 types of character patterns.
[Command format]
Note:
To specify character pattern data continuously to the next address, specify only character pattern data as
follows.
The addresses of CGRAM are automatically incremented. Specification of an address is unnecessary.
The 2nd to 6th byte (character pattern data) are regarded as one data item, so 200 ns is sufficient for t
DOFF
time between bytes.
C0 C5 C10C15C20C25C30
*
B0 B1 B2 B3 B4 B5 B6 B7
2nd byte
(2nd)
LSB
MSB
: specifies 1st column data
(rewritten into CGRAM address 00H)
C1 C6 C11 C16C21C26C31
*
B0 B1 B2 B3 B4 B5 B6 B7
3rd byte
(3rd)
LSB
MSB
: specifies 2nd column data
(rewritten into CGRAM address 00H)
X0 X1 X2 X3
0
1
0 0/1
B0 B1 B2 B3 B4 B5 B6 B7
1st byte
(1st)
LSB
MSB
: selects CGRAM data write mode and specifies
CGRAM address.
(Ex: specifies CGRAM address 00H)
C2 C7 C12C17C22C27C32
*
B0 B1 B2 B3 B4 B5 B6 B7
4th byte
(4th)
LSB
MSB
: specifies 3rd column data
(rewritten into CGRAM address 00H)
C3 C8 C13C18C23C28C33
*
B0 B1 B2 B3 B4 B5 B6 B7
5th byte
(5th)
LSB
MSB
: specifies 4th column data
(rewritten into CGRAM address 00H)
C4 C9 C14C19C24C29C34
*
B0 B1 B2 B3 B4 B5 B6 B7
6th byte
(6th)
LSB
MSB
: specifies 5th column data
(rewritten into CGRAM address 00H)
0: Select CGRAM_A
1: Select CGRAM_B
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