
Contents - 14
Chapter 19
Internal DMA Control Function
19.1 Overview.......................................................................................................................... 19-1
19.2 Registers for the Internal DMA Control Function ........................................................... 19-2
19.2.1
Description of the Registers for the Internal DMA Control Function...................... 19-3
(1)
Current address registers (CH0ADDRESS/CH1ADDRESS) .................................. 19-3
(2)
Current word count registers (CH0WDCNT/CH1WDCNT) ................................... 19-4
(3)
Mode register (MODE)............................................................................................ 19-5
(4)
Mask registers (CH0MSK/CH1MSK) ..................................................................... 19-6
(5)
Interrupt status register (INTSTAT) ........................................................................ 19-7
(6)
Interrupt enable register (INTENBL)....................................................................... 19-8
(7)
DREQ monitor register (DREQMON) .................................................................... 19-9
(8)
Option register (OPTION) ..................................................................................... 19-10
(9)
Packet size registers (CH0PKTSZ/CH1PKTSZ) ................................................... 19-11
(10)
Maximum packet size registers (CH0MXPKTSZ/CH1MXPKTSZ) ..................... 19-12
(11)
First byte detection count registers (CH0RXCNT/CH1RXCNT).......................... 19-13
(12)
USB bank register (UBANK) ................................................................................ 19-14
(13)
Media bank register (MBANK) ............................................................................. 19-15
Chapter 20
Flash Memory
20.1 Overview.......................................................................................................................... 20-1
20.2 Features ............................................................................................................................ 20-1
20.3 Programming Modes........................................................................................................ 20-2
20.4 Parallel Mode ................................................................................................................... 20-3
20.4.1
Overview of the Parallel Mode ................................................................................ 20-3
20.4.2
General-Purpose PROM Writer Setting ................................................................... 20-3
20.4.3
Flash Memory Programming Conversion Adapter .................................................. 20-3
20.5 Serial Mode ...................................................................................................................... 20-4
20.5.1
Overview of the Serial Mode ................................................................................... 20-4
20.5.2
Serial Mode Settings ................................................................................................ 20-4
(1)
Pins used in serial mode........................................................................................... 20-4
(2)
Serial mode connection circuit................................................................................. 20-5
(3)
Serial mode programming method........................................................................... 20-6
(4)
Setting of security function ...................................................................................... 20-6
20.6 User Mode........................................................................................................................ 20-7
20.6.1
Overview of the User Mode..................................................................................... 20-7
20.6.2
User Mode Programming Registers ......................................................................... 20-7
20.6.3
Description of User Mode Registers ........................................................................ 20-8