參數(shù)資料
型號(hào): ML610Q409-XXXWA
廠商: LAPIS SEMICONDUCTOR CO LTD
元件分類: 微控制器/微處理器
英文描述: RISC MICROCONTROLLER, UUC88
封裝: CHIP
文件頁數(shù): 9/33頁
文件大?。?/td> 282K
代理商: ML610Q409-XXXWA
FEDL610Q409-01
OKI SEMICONDUCTOR
ML610Q407/ML610Q408/ML610Q409
17/33
Pin name
I/O
Description
Primary/
Secondary/
Tertiary
Logic
RC oscillation type A/D converter
IN0
I
Channel 0 oscillation input pin. This pin is used as the secondary function
of the P30 pin.
Secondary
CS0
O
Channel 0 reference capacitor connection pin. This pin is used as the
secondary function of the P31 pin.
Secondary
RCT0
O
Resistor/capacitor sensor connection pin of Channel 0 for measurement.
This pin is used as the secondary function of the P33 pin.
Secondary
RS0
O
This pin is used as the secondary function of the P32 pin which is the
reference resistor connection pin of Channel 0.
Secondary
RT0
O
Resistor sensor connection pin of Channel 0 for measurement. This pin is
used as the secondary function of the P34 pin.
Secondary
RCM
O
RC oscillation monitor pin. This pin is used as the secondary function of
the P35 pin.
Secondary
IN1
I
Oscillation input pin of Channel 1. This pin is used as the secondary
function of the P44 pin.
Secondary
CS1
O
Reference capacitor connection pin of Channel 1. This pin is used as the
secondary function of the P45 pin.
Secondary
RS1
O
Reference resistor connection pin of Channel 1. This pin is used as the
secondary function of the P46 pin.
Secondary
RT1
O
Resistor sensor connection pin for measurement of Channel 1. This pin is
used as the secondary function of the P47 pin.
Secondary
LCD drive signal
COM0-4
O
Common output pins.
SEG0-31
O
Segment output pins.
SEG32-35
O
Segment output pin. These pins are for the ML610Q408/ML610Q409, but
are not provided in the ML610Q407.
SEG36-39
O Segment output pin. These pins are for the ML610Q409, but are not
provided in the ML610Q407/ML610Q408.
LCD driver power supply
VL1
VL2
VL3
Power supply pins for LCD bias (internally generated or positive power
supply pin
connected ). Depending on LCD Bias setting and VDD voltage
level, VDD or VDDL or capacitor is connected. For details of the connection
method, see user’s manual.
C1
C2
Power supply pins for LCD bias (internally generated). Capacitors C12 is
connected between C1 and C2.
For testing
TEST
I/O Input/output pin for testing. A pull-down resistor is internally connected.
Power supply
VSS
— Negative power supply pin.
VDD
— Positive power supply pin for I/O, internal regulator, battery low detector,
and power-on reset.
VDDL
— Positive power supply pin (internally generated) for internal logic.
Capacitor CL (see Appendix C measuring circuit 1) is connected between
this pin and VSS.
VPP
— Power supply pin for programming Flash ROM. A pull-down resistor is
internally connected.
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