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參數(shù)資料
| 型號： | ML2037IP |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 數(shù)字信號處理外設(shè) |
| 英文描述： | DSP-NUM CONTROLLED OSCILLATOR, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 7/10頁 |
| 文件大?。?/td> | 213K |
| 代理商： | ML2037IP |
ML2037
6
REV. 1.0 10/10/2000
16-BIT
SHIFT REGISTER
16-BIT
DATA LATCH
21-BIT
ADDER
A16 A0
A20 A15
B0–B20
–
21-BIT
LATCH
SUM (21 BITS)
Q20
Q0
BINARY
PHASE ACCUMULATOR
fREF
QUADRANT
COMPLEMENTER
LEAST
SIGNIFICANT
(12 BITS)
PHASE SAMPLES
(7 BITS)
SIGN BIT
QUADRANT
BIT
(16 BITS)
(16 BITS)
INPUT TO
QUADRANT
COMPLEMENTOR
T =
1
fREF
INPUT TO
ROM
PICTORIAL
PRESENTATION
OF DIGITAL DATA
INPUT TO SIGN
COMPLEMENTOR
SIGN
BIT
(7 BITS)
READ-ONLY
MEMORY
(128 X 7)
(7 BITS)
(7 BITS)
(7BITS)
SIGN
COMPLEMENTOR
OUTPUT
LATCH
8-BIT
DIGITAL-TO-ANALOG
CONVERTER
GAIN CONTROL &
LOW-PASS
FILTER
SINEWAVE
OUTPUT
OUTPUT OF
LOW-PASS
FILTER
(ANALOG
SIGNAL)
INPUT TO
LOW-PASS
FILTER
(ANALOG
SIGNAL)
INPUT TO D/A
CONVERTER
INPUT TO
OUTPUT LATCH
SIGN
BIT
SIGN
BIT
fREF
CLK IN
CRYSTAL
OSCILLATOR
÷2
S ENABLE
S DATA IN
G1
G0
Figure 1. Detailed Block Diagram of the ML2037.
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