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參數(shù)資料
| 型號(hào)： | ML14469-4P |
| 廠商： | LANSDALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1 CHANNEL(S), 9600 bps, SERIAL COMM CONTROLLER, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁(yè)數(shù)： | 5/10頁(yè) |
| 文件大?。?/td> | 238K |
| 代理商： | ML14469-4P |
www.lansdale.com
Page 4 of 10
Issue 0
LANSDALE Semiconductor, Inc.
ML14469
Figure 1. Data Format and Corresponding Data Position and Pins for MC14469 and MC6850
A0 to A6 = ADDRESS BITS
ID0 to ID7 = ML14469 IDENTIFICATION CODE
S0 to S7 = ML14469 STATUS CODE
D0 to D7 = ACIA BUS BITS
C0 to C6 = COMMAND BITS
SP = STOP BIT
P = PARITY BIT
ST = START BIT
D7
D6
D5
D4
D3
D2
D1
D0
S7
S6
S5
S4
S3
S2
S1
S0
D6
D5
D4
D3
D2
D1
D0
C6
C5
C4
C3
C2
C1
C0
D7
D6
D5
D4
D3
D2
D1
D0
ID7
ID6
ID5
ID4
ID3
ID2
ID1
ID0
PIN DESIGNATION
MC6850
PIN DESIGNATION
ML14469
TRANSMIT DATA (TRO)
RECEIVE DATA (RI)
D6
D5
D4
D3
D2
D1
D0
A6
A5
A4
A3
A2
A1
A0
PIN DESIGNATION
MC6850
PIN DESIGNATION
ML14469
STATUS
INPUT DATA
SP
P
ST
SP
P
ST
COMMAND
IDENTIFIER
(LOW LOGIC LEVEL)
COMMAND
SP
P
ST
ADDRESS
IDENTIFIER
(HIGH LOGIC LEVEL)
ADDRESS
SP
P
ST
S
P
S
M
S
B
Figure 2. Typical Receive/Send Cycle
TRANSMIT OUT
(TRO)
STATUS
ID
SEND INPUT
(SEND)
COMMAND STROBE
OUTPUT (CS)
INTERNAL SEND
ENABLE LATCH
(SEL)
INTERNAL VALID
ADDRESS LATCH
(VAL)
VALID ADDRESS PULSE
(VAP)
S
P
X
S
3
7
6
5
4
2
1
0
T
3
7
6
5
4
2
1
M
S
B
P
X
P
X
S
T
S
T
RECEIVER INPUT (RI)
COMMAND
ADDRESS
M
S
B
M
S
B
S
P
S
P
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
P
T0
X
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