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參數(shù)資料
| 型號： | MK5811CMLF |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 5/10頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK GENERATOR LOW EMI 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 97 |
| 類型： | 時鐘發(fā)生器 |
| PLL： | 是 |
| 輸入： | 時鐘，晶體 |
| 輸出： | LVCMOS |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:1 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 32MHz |
| 除法器/乘法器： | 無/是 |
| 電源電壓： | 3 V ~ 3.63 V |
| 工作溫度： | 0°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 1254 (CN2011-ZH PDF) |
| 其它名稱： | 800-1790 800-1790-5 800-1790-ND |
MK5811C
LOW EMI CLOCK GENERATOR
SSCG
IDT LOW EMI CLOCK GENERATOR
4
MK5811C
REV F 121409
Crystal Information
The crystal used should be a fundamental mode (do not use
third overtone), parallel resonant crystal. To optimize the
initial accuracy, connect crystal capacitors from pins X1 to
ground and X2 to ground. The value of these capacitors is
given by the following equation:
Crystal caps (pF) = (CL - 6) x 2
In the equation, CL is the crystal load capacitance. For
example, a crystal with a 16 pF load capacitance uses two
20 pF [(16-6) x 2] capacitors.
Spread Spectrum Profile
The MK5811C is a low EMI clock generator using a
optimized frequency slew rate algorithm to facilitate down
stream tracking of zero delay buffers and other PLL devices.
Modulation Rate
Spread Spectrum Clock Generators utilize frequency
modulation (FM) to distribute energy over a specific band of
frequencies. The maximum frequency of the clock (fmax)
and minimum frequency of the clock (fmin) determine this
band of frequencies. The time required to transition from
fmin to fmax and back to fmin is the period of the Modulation
Rate. The Modulation Rate of SSCG clocks are generally
referred to in terms of frequency, or
fmod = 1/Tmod
The input clock frequency, fin, and the internal divider
determine the Modulation Rate.
The Spread Spectrum modulation Rate, fmod, is given by
the following formula:
fmod = fin/DR
where; fmod is the Modulation Rate, fin is the Input
Frequency and DR is the Divider Ratio as given in the
“Modulation Rate Divider Ratios” table. Notice that Input
Frequency Range is set by FRSEL.
Modulation Rate Divider Ratios
Ti m e
F
requen
c
y
Modulation Rate
FRSEL
Input Freq. Range
Divider Ratio (DR)
0
4 to 8 MHz
128
1
8 to 16 MHz
256
M
16 to 32 MHz
512
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MK5811CMLFT | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 SPREAD SPECTRUM CLOCK SYNTHESIZER RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MK5811G | 制造商:Integrated Device Technology Inc 功能描述:8 TSSOP - Bulk |
| MK5811GLF | 制造商:Integrated Device Technology Inc 功能描述:MK5811GLF - Bulk |
| MK5811GLFTR | 制造商:Integrated Device Technology Inc 功能描述:MK5811GLFTR - Tape and Reel |
| MK5811GTR | 制造商:Integrated Device Technology Inc 功能描述:MK5811GTR - Tape and Reel |
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