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參數(shù)資料
| 型號： | MK52DN512ZCLQ10 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP144 |
| 封裝： | 20 X 20 MM, LQFP-144 |
| 文件頁數(shù)： | 24/81頁 |
| 文件大?。?/td> | 1106K |
| 代理商： | MK52DN512ZCLQ10 |
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Table 15. MCG specifications (continued)
Symbol
Description
Min.
Typ.
Max.
Unit
Notes
fdco_t_DMX3
2
DCO output
frequency
Low range (DRS=00)
732 × ffll_ref
—
23.99
—
MHz
Mid range (DRS=01)
1464 × ffll_ref
—
47.97
—
MHz
Mid-high range (DRS=10)
2197 × ffll_ref
—
71.99
—
MHz
High range (DRS=11)
2929 × ffll_ref
—
95.98
—
MHz
Jcyc_fll
FLL period jitter
—
TBD
ps
Jacc_fll
FLL accumulated jitter of DCO output over a 1s
time window
—
TBD
ps
tfll_acquire
FLL target frequency acquisition time
—
1
ms
PLL
fvco
VCO operating frequency
48.0
—
100
MHz
Ipll
PLL operating current
PLL @ 96 MHz (fosc_hi_1 = 8 MHz, fpll_ref =
2 MHz, VDIV multiplier = 48)
—
1060
—
A
Ipll
PLL operating current
PLL @ 48 MHz (fosc_hi_1 = 8 MHz, fpll_ref =
2 MHz, VDIV multiplier = 24)
—
600
—
A
fpll_ref
PLL reference frequency range
2.0
—
4.0
MHz
Jcyc_pll
PLL period jitter (RMS)
fvco = 48 MHz
fvco = 100 MHz
—
120
50
—
ps
Jacc_pll
PLL accumulated jitter over 1s (RMS)
fvco = 48 MHz
fvco = 100 MHz
—
1350
600
—
ps
Dlock
Lock entry frequency tolerance
± 1.49
—
± 2.98
%
Dunl
Lock exit frequency tolerance
± 4.47
—
± 5.97
%
tpll_lock
Lock detector detection time
—
0.15 +
1075(1/
fpll_ref)
ms
1. The startup time is defined as the time between the IRC being enabled, either by the MCG or by the IRCLKEN bit being
set, and the first edge of the internal reference clock.
2. This parameter is measured with the internal reference (slow clock) being used as a reference to the FLL (FEI clock
mode).
3. These typical values listed are with the slow internal reference clock (FEI) using factory trim and DMX32=0.
4. The resulting system clock frequencies should not exceed their maximum specified values. The DCO frequency deviation
(
Δfdco_t) over voltage and temperature should be considered.
Peripheral operating requirements and behaviors
K52 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011.
30
Preliminary
Freescale Semiconductor, Inc.
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| MK52DN512ZCMD10 | 制造商:Freescale Semiconductor 功能描述:MCU 32-Bit/64-Bit K52 ARM Cortex M4 RISC 512KB Flash 1.8V/2.5V/3.3V 144-Pin MAP-BGA Tray 制造商:Freescale Semiconductor 功能描述:KINETIS 512K ETHNET - Bulk 制造商:Freescale Semiconductor 功能描述:IC MCU ARM 512KB FLASH 144BGA 制造商:Freescale Semiconductor 功能描述:MCU 32BIT KINETIS 512K 144MAP 制造商:Freescale Semiconductor 功能描述:MCU, 32BIT, KINETIS, 512K, 144MAP 制造商:Freescale Semiconductor 功能描述:K52 Series 32 Bit 512 K Flash 128 K RAM Cortex M4/DSP Microcontroller-MAPBGA-144 制造商:Freescale Semiconductor 功能描述:ARM Microcontrollers - MCU KINETIS 512K ETHNET 制造商:Freescale Semiconductor 功能描述:IC 32BIT MCU KINETIS K50 100MHZ 144-MAPBGA, Controller Family/Series:(ARM Cortex - M4) Kinetis K50, Core Size:32bit, No. of I/O's:96, Supply Voltage Min:1.71V, Supply Voltage Max:3.6V, Digital IC Case Style:MAPBGA, No. of Pins:144 , RoHS Compliant: Yes |
| MK52DN512ZCYY10 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated measurement engine, Ethernet and LCD |
| MK52N512CLQ100 | 制造商:Freescale Semiconductor 功能描述: |
| MK52N512CMD100 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz |
| MK531BZ | 制造商:BROTHER 功能描述:12MM BLACK ON BLUE |
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