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參數(shù)資料
| 型號： | MK3727HTR |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 36 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| 封裝： | 0.150 INCH, SOIC-8 |
| 文件頁數(shù)： | 2/7頁 |
| 文件大?。?/td> | 176K |
| 代理商： | MK3727HTR |
MK3727H
LOW DRIVE 3.3 VOLT VCXO
VCXO AND MULTIPLIER
IDT / ICS LOW DRIVE 3.3 VOLT VCXO
2
MK3727H
REV E 041906
Pin Assignment
Pin Descriptions
X1
VD D
VI N
GND
NC
CLK
X2
1
2
3
4
8
7
6
5
8 Pin (150 m il) S O IC
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
X1
Input
Crystal connection. Connect to a 12 to 18 MHz external pullable
crystal.
2
VDD
Power
Connect to +3.3 V.
3
VIN
Input
Voltage input to VCXO. 0 to 3.3 V analog input which controls the
oscillation frequency of the VCXO.
4
GND
Input
Connect to ground.
5
CLK
Output
VCXO clock output; 2x input frequency.
6
NC
—
No connect. Do not connect to anything.
7
GND
Input
Connect to ground.
8
X2
Output
Crystal connection. Connect to a 12 to 18 MHz external pullable
crystal.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MK3727S | 制造商:ICS 制造商全稱:ICS 功能描述:LOW COST 24 - 36 MHZ 3.3 VOLT VCXO |
| MK3727SLF | 制造商:Integrated Device Technology Inc 功能描述:IDT MK3727SLF PHASED LOCKED LOOP (PLL) - Rail/Tube 制造商:Integrated Device Technology Inc 功能描述:IDT MK3727SLF Phased Locked Loop (PLL) |
| MK3727STR | 制造商:INT_CIR_SYS 功能描述: |
| MK3732-05S | 制造商:MICROCLOCK 功能描述: 制造商:MICROCLOCK 功能描述:108 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| MK3732-07 | 制造商:ICS 制造商全稱:ICS 功能描述:ADSL VCXO CLOCK SOURCE |
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