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參數(shù)資料
| 型號： | MK2048-01SLFTR |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 77.76 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| 封裝： | 0.150 INCH, SOIC-16 |
| 文件頁數(shù)： | 2/5頁 |
| 文件大小： | 74K |
| 代理商： | MK2048-01SLFTR |
MK2048
Communications Frequency Generator
MDS 2048-01 B
2
Revision 022598
Printed 11/15/00
MicroClock Division of ICS1271 Parkmoor Ave.San JoseCA95126(408)295-9800tel(408)295-9818fax
PRELIMINARY INFORMATION
I C R O
C LOC K
Number
Name
Type Description
1
X1
I
Crystal connection. Connect to a 12.288 MHz crystal.
2
VDD
P
Connect to +5V.
3
VDD
P
Connect to +5V.
4
CAP1
LF
Connect a 0.1 F ceramic capacitor and a 1 k
resistor in series between this pin and CAP2.
5
GND
P
Connect to ground.
6
CAP2
LF
Connect a 0.1 F ceramic capacitor and a 1 k
resistor in series between this pin and CAP1.
7
GND
P
Connect to ground.
8
FS0
I
Frequency Select 0. Determines CLK input/outputs per table above.
9
FS1
I
Frequency Select 1. Determines CLK input/outputs per table above.
10
CLK1
O
Clock 1 output determined by status of FS3:0 per table above.
11
CLK2
O
Clock 2 output determined by status of FS3:0 per table above.
12
FS2
I
Frequency Select 2. Determines CLK input/outputs per table above.
13
ICLK
I
Input clock connection. Connect to 8 kHz backplane or other Loop Timing clock.
14
FS3
I
Frequency Select 3. Determines CLK input/outputs per table above.
15
N/C
-
No Connect. Nothing is connected internally to this pin.
16
X2
I
Crystal conection. Connect to a 12.288 MHz crystal.
Pin Descriptions
Type: I = Input, O = output, P = power supply connection, LF = loop filter connection
Pin Assignment
16 pin (150 mil) SOIC
1
16
2
3
4
15
14
13
CAP1
GND
VDD
ICLK
5
6
7
8
12
11
10
9
FS0
FS3
CAP2
X2
CLK2
CLK1
GND
FS2
VDD
X1
N/C
FS1
CLK1
CLK2
Output Clocks Decoding Table-External Mode (MHz)
0 = connect directly to ground, 1 = connect directly to VDD.
12.288 MHz input crystal is applied to pins 1 and 16; all other
inputs are applied to pin 13.
Input
FS3
FS2
FS1
FS0
CLK1
CLK2
8 kHz
0
2.048
4.096
8 kHz
0
1
1.544
3.088
8 kHz
0
1
0
17.184
34.368
8 kHz
0
1
22.368
44.736
8 kHz
1
0
38.88
2.43
8 kHz
1
0
1
38.88
77.76
8 kHz
1
0
9.72
19.44
12.288
1
0
2.048
4.096
12.288
1
0
1
1.544
3.088
12.288
1
0
1
0
17.184
34.368
12.288
1
0
1
22.368
44.736
Input
FS3
FS2
FS1
FS0
CLK1
CLK2
2.048
0
1
0
2.048
4.096
1.544
0
1
0
1
1.544
3.088
34.368
0
1
0
17.184
34.368
44.736
0
1
22.368
44.736
19.44
1
9.72
19.44
Output Clocks Decoding Table-Loop Timing (MHz)
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