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參數(shù)資料
| 型號(hào)： | MK1728AM-01LF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 36 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| 封裝： | 0.150 INCH, ROHS COMPLIANT, SOIC-8 |
| 文件頁數(shù)： | 2/9頁 |
| 文件大小： | 98K |
| 代理商： | MK1728AM-01LF |
MK1728A-01
2.5 VOLT LOW EMI CLOCK GENERATOR
SSCG
IDT 2.5 VOLT LOW EMI CLOCK GENERATOR
2
MK1728A-01 REV B 121410
Pin Assignment
Spread Direction and Percentage
Select Table
0 = connect to GND
M = unconnected (floating)
1 = connect directly to VDD
Pin Descriptions
X1/ICLK
VDD
GND
S1
FRSEL
S0
SSCLK
X2
1
2
3
4
8
7
6
5
8 pin (150 mil) SOIC/TSSOP
S1
Pin 7
S0
Pin 5
Spread
Direction
Typical Spread
Percentage (%)
0
Center
±0.5
0
M
Center
±1.0
0
1
Center
±1.5
M
0Center
±2.0
M
No Spread
-
M
1
Down
-0.5
1
0Down
-1.0
1
MDown
-1.5
1
Down
-2.0
FRSEL
(pin 4)
Input
Freq. Range
Multiplier
Output
Freq. Range
0
4.0 to 8.0 MHz
X1
4.0 to 8.0 MHz
1
8.0 to 16.0MHz
X1
8.0 to 16.0MHz
M
16.0 to 36.0MHz
X1
16.0 to 36.0MHz
Pin
Number
Pin
Name
Pin Type
Pin Description
1
X2
XO
Crystal connection to a 4 to 36 MHz crystal. Leave unconnected for clock.
2
VDD
Power
Connect to +2.5 V.
3
GND
Power
Connect to ground.
4
FRSEL
Input
Function select for input frequency range. Default to mid-level “M”.
5
S0
Input
Function select 0 input. Selects spread amount and direction per table above
(default-internal mid-level).
6
SSCLK
Output
Clock output with spread spectrum.
7
S1
Input
Function select 1 input. Selects spread amount and direction per table above
(default-internal mid-level).
8
X1/ICLK
Input
Connect to a 4 to 36 MHz crystal or clock.
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參數(shù)描述 |
|---|---|
| MK1728AM-01LFT | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 2.5V LOW EMI CLOCK GENERATOR RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
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