參數(shù)資料
型號: MK1726-08SLFTR
元件分類: 時鐘產(chǎn)生/分配
英文描述: 32 MHz, OTHER CLOCK GENERATOR, PDSO8
封裝: 0.150 INCH, LEAD FREE, SOIC-8
文件頁數(shù): 3/7頁
文件大?。?/td> 135K
代理商: MK1726-08SLFTR
Spread Spectrum Clock Generator
MDS 1726-08 B
3
Revision 072204
Integrated Circuit Systems, Inc.
525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
MK1726-08
l
External Components
The MK1726-08 requires a minimum number of
external components for proper operation.
Decoupling Capacitor
A decoupling capacitor of 0.01F must be connected
between VDD and GND, as close to these pins as
possible. For optimum device performance, the
decoupling capacitor should be mounted on the
component side of the PCB. Avoid the use of vias in the
decoupling circuit.
Series Termination Resistor
When the PCB trace between the clock output and the
load is over 1 inch, series termination should be used.
To series terminate a 50
trace (a commonly used
trace impedance) place a 33
resistor in series with
the clock line, as close to the clock output pin as
possible. The nominal impedance of the clock output is
20
.
PCB Layout Recommendations
For optimum device performance and lowest output
phase noise, the following guidelines should be
observed.
1) The 0.01F decoupling capacitor should be mounted
on the component side of the board as close to the
VDD pin as possible. No vias should be used between
the decoupling capacitor and VDD pin. The PCB trace
to VDD pin should be kept as short as possible, as
should the PCB trace to the ground via.
2) To minimize EMI, the 33
series termination resistor
(if needed) should be placed close to the clock output.
3) An optimum layout is one with all components on the
same side of the board, minimizing vias through other
signal layers. Other signal traces should be routed
away from the MK1726-08. This includes signal traces
just underneath the device, or on layers adjacent to the
ground plane layer used by the device.
Crystal Information
The crystal used should be a fundamental mode (do
not use third overtone), parallel resonant. Crystal
capacitors should be connected from pins X1 to ground
and X2 to ground to optimize the initial accuracy. The
value of these capacitors is given by the following
equation:
Crystal caps (pF) = (CL - 6) x 2
In the equation, CL is the crystal load capacitance. So,
for a crystal with a 16 pF load capacitance, two 20 pF
[(16-6) x 2] capacitors should be used.
Spread Spectrum Profile
The MK1726-08 low EMI clock generator uses an
optimized frequency slew rate algorithm to facilitate
down stream tracking of zero delay buffers and other
PLL devices. The frequency modulation amplitude is
constant with variations of the input frequency.
Ti m e
F
req
uenc
y
Modulation Rate
相關(guān)PDF資料
PDF描述
MK1726-08STR 32 MHz, OTHER CLOCK GENERATOR, PDSO8
MK1728AG-01LF 36 MHz, OTHER CLOCK GENERATOR, PDSO8
MK1728AM-01LF 36 MHz, OTHER CLOCK GENERATOR, PDSO8
MK1728AG-01LFT 36 MHz, OTHER CLOCK GENERATOR, PDSO8
MK2011SLFTR 50 MHz, OTHER CLOCK GENERATOR, PDSO8
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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MK1728AG-01LFT 功能描述:時鐘發(fā)生器及支持產(chǎn)品 2.5V LOW EMI CLOCK GENERATOR RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
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