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參數(shù)資料
| 型號： | MK1716-01R |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 133.33 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| 封裝： | 0.150 INCH, SSOP-28 |
| 文件頁數(shù)： | 3/9頁 |
| 文件大?。?/td> | 217K |
| 代理商： | MK1716-01R |
MK1716-01
SERIAL PROGRAMMABLE PCI SS VERSACLOCK SYNTHESIZER
SSCG
IDT SERIAL PROGRAMMABLE PCI SS VERSACLOCK SYNTHESIZER
3
MK1716-01
REV G 121809
Configuring the MK1716-01
Initial State: The MK1716-01 may be configured to have up to nine frequency outputs, utilizing a single PLL and
on-board spread spectrum circuitry. Unprogrammed, the part has the following outputs, related to the reference
input clock:
The STROBE pin must have an external 250 kOhm pull-up resistor to acheive the Initial State.
The input crystal range for the MK1716-01 is 5 MHz to 27 MHz.
The MK1716-01 can be programmed to set the output functions and frequencies. 160 data bits generated by the
VersaClockTM software are written in DATA pin in this order: MSB (left most bit) first.
As show in Figure 2, after these 160 bits are clocked into the MK1716-01, taking STROBE high will send this data
to the internal latch and the CLK output will lock within 10 ms.
Note: STROBE utilizes a transparent latch that is latched when in the high state. If STROBE is in the high state and
SCLK is pulsed, DATA is clocked directly to the internal latch and the output conditions will change accordingly.
Although this will not damage the MK1716-01, it is recommended that STROBE be kept low while DATA is being
clocked into the MK1716-01 in order to avoid unintended changes on the output clocks.
AC Parameters for Writing to the MK1716-01
Default Outputs
Output
Frequency
Clock 1-9 (Pins 4, 10 - 19)
Reference output
Parameter
Condition
Min.
Max.
Units
tSETUP
Setup time
10
ns
tHOLD
Hold time after SCLK
10
ns
tW
Data wait time
10
ns
tS
Strobe pulse width
40
ns
SCLK Frequency
30
MHz
DATA
t
hold
t
setup
SCLK
STROBE
t
s
t
w
Figure 2. Tim ing D iagram for Program m ing the M K1716-01
Bit160
Bit2
Bit1
Bit3
Bit159
Bit158
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MK1716-01RLF | 133.33 MHz, OTHER CLOCK GENERATOR, PDSO28 |
| MK1716R-01RT | 133.33 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| MK1726-08SLFTR | 32 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| MK1726-08STR | 32 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| MK1728AG-01LF | 36 MHz, OTHER CLOCK GENERATOR, PDSO8 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MK1716-01RLF | 功能描述:時(shí)鐘合成器/抖動清除器 SERIAL PROGRAMMABLE PCI SS VERSACLOCK SY RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| MK1716-01RLFTR | 功能描述:時(shí)鐘合成器/抖動清除器 SERIAL PROGRAMMABLE PCI SS VERSACLOCK SY RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| MK1716-01RTR | 功能描述:IC CLK SOURCE SER PROGR 28-QSOP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:VersaClock™ 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| MK172 | 制造商:Velleman Inc 功能描述:Sound Star Kit 制造商:Velleman Inc 功能描述:Sound LED Star Kit |
| MK1725 | 制造商:ICS 制造商全稱:ICS 功能描述:Quad Output Spread Spectrum Clock Generator |
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