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參數(shù)資料
| 型號(hào)： | MK1493-14GLF |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 100 MHz, OTHER CLOCK GENERATOR, PDSO28 |
| 封裝： | 0.173 INCH, ROHS COMPLIANT, MO-153, TSSOP-28 |
| 文件頁數(shù)： | 3/16頁 |
| 文件大?。?/td> | 167K |
| 代理商： | MK1493-14GLF |
SPREAD SPECTRUM CLOCK GENERATOR
MDS 1493-14 A
11
Revision 082205
In te gr ated Circuit Systems ● 525 Ra ce Street, San Jose, CA 9512 6 ● tel (4 08) 297-1 201 ● www.icst.com
MK1493-14
AC Electrical Characteristics F100M/F100MA/F100MB/F100MC Clock, 0.7V
Current Mode Differential Pair
Unless stated otherwise, VDD = 3.3 V ±10%, Ambient Temperature 0 to +70
°C
IREF
If board target trace impedance (Z) is 50
, then RSET = 475 (1%), providing IREF of 2.32 mA, output current
(IOH) is equal to 6*IREF.
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Clock Frequency
100
MHz
Jitter, Cycle to Cycle
±85
ps
Period Jitter
±85
Long-Term Jitter
Note 2, Measured at 10us
±500
ps
Spread Range
Note 3
-0.5
0
%
Spread Rate
Note 3
31
KHz
Clock Period
TPeriod
Note 4, 5, 6
without spread and without jitter
with 0.0, -0.5% spread and jitter
10
9.915
10.025
10.136
ns
Duty Cycle
TDC
Measurement from differential wave forms
45
50
55
%
Clock Stabilization from
power up
2ms
Rise Time
TR
Note 7, VOL = 0.175V, VOH = 0.525V
175
700
ps
Fall Time
TF
Note 7, VOL = 0.175V, VOH = 0.525V
175
700
ps
Rise/fall matching
Note 7, 8
20%
Output Skew
T
OSKEW
VT = 50%(measurement threshold)
50
ps
Transmission Line
Characteristic
impedance(Zo)
ZO
50
Driver Output current
impedance, single ended
3000
High-Level Output
Voltage
VOH
Output single-ended voltage, Note 9,
(Rs=33 , RT=50)
0.65
0.71
0.85
V
Low-Level Output Voltage
VOL
-0.20
0
0.05
IOH @6*IR
IOH
-13
-14.2
-17
mA
Output common mode
voltage
[VOCM]
VOCM(DC)
VOCM(AC)
Note 10, 11, RLOAD=100 between
outputs). Peak Change in Output
Common mode Voltage when driving logic
0 and when driving logic1 under DC and
AC conditions
0.25
-0.015
-0.050
0.55
0.015
0.050
V
Output Enable Time
OE going high to valid Differential Outputs
180
ns
Output Disable Time
OE going low to Differential Outputs
becoming invalid(tri-state)
180
ns
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