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參數(shù)資料
| 型號(hào)： | MK1449STR |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 24.576 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| 封裝： | SOIC-8 |
| 文件頁數(shù)： | 4/4頁 |
| 文件大?。?/td> | 40K |
| 代理商： | MK1449STR |
MK1449C
Sound Clock
MDS 1449C A
4
Revision 060198
Printed 11/15/00
MicroClock Division of ICS1271 Parkmoor Ave.San JoseCA95126(408)295-9800tel(408)295-9818fax
PRELIMINARY
PRELIMINARY INFORMATION
INFORMATION
I C R O
C LOC K
While the information presented herein has been checked for both accuracy and reliability, ICS/MicroClock assumes no responsibility for either its use or for the infringement of
any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal
commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not
recommended without additional processing by ICS/MicroClock. ICS/MicroClock reserves the right to change any circuitry or specifications without notice. ICS/MicroClock
does not authorize or warrant any ICS/MicroClock product for use in life support devices or critical medical instruments.
Package Outline and Package Dimensions
Inches
Millimeters
Symbol
Min
Max
Min
Max
A
0.055
0.068
1.397
1.7272
b
0.013
0.019
0.330
0.483
D
0.185
0.200
4.699
5.080
E
0.150
0.160
3.810
4.064
H
0.225
0.245
5.715
6.223
e
.050 BSC
1.27 BSC
h
0.015
0.381
Q
0.004
0.01
0.102
0.254
8 pin SOIC
Ordering Information
Part/Order Number
Marking
Package
Temperature
MK1449S
8 pin SOIC
0-70°C
MK1449STR
MK1449S
8 pin SOIC on tape and reel
0-70°C
External Components / Crystal Selection
The MK1449C requires a 0.01F decoupling capacitor to be connected between VDD and GND. It must
be connected close to the MK1449C to minimize lead inductance. No external power supply filtering is
required for this device. A 33
series terminating resistor can be used next to the clock output pins. The
total on-chip crystal capacitance is approximately 13 pF, so a parallel resonant, fundamental mode crystal
should be used. For crystals with a specified load capacitance greater than 13 pF, crystal capacitors should
be connected from each of the pins X1 and X2 to ground. The value (in pF) of these crystal caps should
be = (CL-13)*2, where CL is the crystal load capacitance in pF. These external capacitors are only required
for applications where the exact frequency is critical. For a clock input, connect to X1 and leave X2
unconnected (no capacitors on either).
c
A
b
D
E
H
e
h x 45°
Q
Pin 1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
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| MK1492-03RLF | 75 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| MK1492-03RTR | 75 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
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