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| 型號(hào)： | MICRF302YML TR |
| 廠商： | Micrel Inc |
| 文件頁(yè)數(shù)： | 12/15頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC ENCODER PAR QWIKRADIO 10-MLF |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類(lèi)型： | 編碼器 |
| 應(yīng)用： | RF，IR |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 10-VFDFN 裸露焊盤(pán)，10-MLF? |
| 供應(yīng)商設(shè)備封裝： | 10-MLF?（3x3） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 產(chǎn)品目錄頁(yè)面： | 571 (CN2011-ZH PDF) |
| 其它名稱(chēng)： | 576-3337-6 |
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Micrel, Inc.
MICRF302
March 2010
6
M9999-032610-A
Functional Description
Overview
The MICRF302 is an encoder that prepares data for
transmission across an RF link. It is a parallel encoder,
meaning that it provides multiple parallel inputs for
connection to low-cost push-button switches.
The MICRF302 encoder translates push button closures,
any combination of D0 to D3, into baseband packets
using a set of internal logic blocks, which we describe
here.
Please refer to the Functional Diagram while
reading the following paragraphs.
Switch Deglitch and Register
When a button is pushed, the switch input is deglitched
to remove transient pulses shorter than 8 ms. The state
of the buttons is frozen and registered prior to
transmission. If multiple buttons are pushed within one
deglitch/sample time, their active levels will all be
included in the transmitted data.
Power Management
Immediately after any switch closure, the MICRF302
wakes from its standby (low-power) state and asserts
the TXEN output to start the RF transmitter. The Power
Management circuitry keeps the MICRF302 active
during packet transmission, then supervises the
transition back to the standby state.
Clock Oscillator
The on-chip, trimmed oscillator is started by the Power
Management logic after startup (button press). It times
all internal events and sets the bit rate of the baseband
data via the clock generator. The clock oscillator
maintains its set frequency with a tolerance of ±10%
over process, voltage, and temperature variations
PPROM Trim
The Poly-fuse Programmable Read-Only Memory stores
the MICRF302’s unique address (see the PPROM ID
block), as well as other necessary information.
Power-On Reset
This self-contained, on-chip reset generator manages
the behavior of the MICRF302 when power is initially
applied, for example when a battery is inserted into the
transmitter. The POR sequencer and PPROM control
logic powers up the PPROM, loads important information
into internal registers, powers down the PPROM, and
then puts the whole chip into its standby state, ready for
the first button push event.
Packet Multiplexor
The packet multiplexor chooses the appropriate
information for the MICRF302 to build and transmit a
packet. Under direction of the encoder state machine,
packet generation, packet assembly logic, the packet
multiplexor serializes the entire packet.
The packet
consists of: preamble, dead time, sync field, address,
and data. The packet multiplexor feeds into CRC
generation and data mux sections.
CRF Generation
computes the industry-standard 8-bit CRC. The data
mux chooses the right information to be sent to the
transmitter. The data mux also ensures that the DOUT
pin is inactive when no packet transmission is in
progress.
Inter-Packet Delay
Getting its timing information from the Clock Generator,
the inter-packet delay block inserts the correct delay
between the four packets in a set. After each inter-
packet delay, the packet is repeated, increasing the
probability of accurate detection at the receiver.
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