參數(shù)資料
型號: MICRF213AYQS
廠商: MICREL INC
元件分類: 消費家電
英文描述: 1.8 V dual UART, 20 Mbit/s (max.) with 128-byte FIFOs, infrared (IrDA), and XScale VLIO bus interface, SOT912-1 (TFBGA36), Tray Pack, Bakeable, Multiple
中文描述: SPECIALTY CONSUMER CIRCUIT, PDSO16
封裝: QSOP-16
文件頁數(shù): 11/16頁
文件大小: 850K
代理商: MICRF213AYQS
Micrel, Inc.
MICRF213
For best results, the values should always be
optimized for the data pattern used. As the baud rate
increases, the capacitor values decrease. Table 9
shows suggested values for Manchester Encoded
data at 50% duty cycle.
May 2007
11
M9999-052307-A
(408) 944-0800
SEL0
JP1
SEL1
JP2
Demod.
BW
(hertz)
1400
2800
5300
9700
Cth
Cagc
Short
Open
Short
Open
Short
Short
Open
Open
100nF
47nF
22nF
10nF
4.7uF
2.2uF
1uF
0.47uF
Table 9. Suggested Cth and Cagc Values
JP3 is a jumper used to configure the digital squelch
function. When it is high, there is no squelch applied
to the digital circuits and the DO (data out) pin yields a
hash signal. When the pin is low, the DO pin activity is
considerably reduced. It will have more or less than
shown in the figure below depending upon the outside
band noise. The penalty for using squelch is a delay in
obtaining a good signal in the DO pin. That is, it takes
longer for the data to show up. The delay is
dependent upon many factors such as RF signal
intensity, data profile, data rate, Cth and Cagc
capacitor values, and outside band noise. See Figure
8 and 9.
Figure 8. Data Out Pin with No Squelch (SQ = 1)
DO Pin
Figure 9. Data Out Pin with Squelch (SQ = 0)
Other components used include: C5, which is a
decoupling capacitor for the Vdd line; R4 reserved for
future use and not needed for the evaluation board;
R3 for the shutdown pin (SHDN = 0, device is
operation), which can be removed if that pin is
connected to a microcontroller or an external switch;
and R1 and R2 which form a voltage divider for the
AGC pin. One can force a voltage in this AGC pin to
purposely decrease the device sensitivity. Special
care is needed when doing this operation, as an
external control of the AGC voltage may vary from lot
to lot and may not work the same in several devices.
Three other pins need to be discussed as well. They
are the DO, RSSI, and shut down pins. The DO pin
has a driving capability of 0.4mA. This is good enough
for most of the logic families ICs in the market today.
The RSSI pin provides a transfer function of the RF
signal intensity vs. voltage. It is very useful to
determine the signal to noise ratio of the RF link,
crude range estimate from the transmitter source and
AM demodulation, which requires a low Cagc
capacitor value.
The shut down pin (SHDN) is useful to save energy.
Making its level close to Vdd (SHDN = 1), the device
is then not in operation. Its DC current consumption is
less than 1μA (do not forget to remove R3). When
toggling from high to low, there will be a time required
for the device to come to steady state mode, and a
time for data to show up in the DO pin. This time will
be dependent upon many things such as temperature,
crystal used, and if the there is an external oscillator
with faster startup time. Crystal vendors suggest that
the data will show up in the DO pin around 1msec
time, and 2msec over the temperature range of the
device. See Figure 10.
DO Pin
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