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參數(shù)資料
| 型號： | MICRF011BN |
| 廠商： | MICREL INC |
| 元件分類： | 消費家電 |
| 英文描述： | QwikRadiotm Receiver/Data Demodulator Preliminary Information |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PDIP14 |
| 封裝： | DIP-14 |
| 文件頁數(shù)： | 2/11頁 |
| 文件大?。?/td> | 147K |
| 代理商： | MICRF011BN |
QwikRadio
tm
2
December 1998b
MICRF011
MICRF011
Micrel
Ordering Information
Part Number
MICRF011BN
MICRF011BM
Temperature Range
-40
°
C to +85
°
C
-40
°
C to +85
°
C
Package
14-Pin DIP
14-Pin SOIC
Pin Configuration (DIP and SOIC)
Pin Description
Pin Number
1
2/3
Pin Name
SEL0
VSSRF
Pin Function
Programs desired Demodulator Filter Bandwidth. This pin in internally pulled-up to VDD. See Table 1.
This pin is the ground return for the RF section of the IC. The bypass capacitor connected from VDDRF to
VSSRF should have the shortest possible lead length. For best performance, connect VSSRF to VSSBB
at the power supply only (i.e., keep VSSBB currents from flowing through VSSRF return path).
This is the receive RF input, internally ac-coupled. Connect this pin to the receive antenna. Input
impedance is high (FET gate) with approximately 2pF of shunt (parasitic) capacitance. For applications
located in high ambient noise environments, a fixed value band-pass network may be connected between
the ANT pin and VSSRF to provide additional receive selectivity and input overload protection. (See
“Application Note 22, MICRF001 Theory of Operation”
.)
This pin is the positive supply input for the RF section of the IC. VDDBB and VDDRF should be connected
directly at the IC pins. Connect a low ESL, low ESR decoupling capacitor from this pin to VSSRF, as short
as possible.
This pin is the positive supply input for the baseband section of the IC. VDDBB and VDDRF should be
connected directly at the IC pins.
This capacitor extracts the (DC) average value from the demodulated waveform, which becomes the
reference for the internal data slicing comparator. Treat this as a low-pass RC filter with source impedance
of
118kohms
(for REFOSC frequency ft=4.90MHz)
. Note that variation in source resistance with filter
selection no longer exists, as it does for the MICRF001
. (See
“Application Note 22, MICRF001 Theory
of Operation”
, section 6.4). A standard
±
20% X7R ceramic capacitor is generally sufficient.
Output data pin. CMOS level compatible.
This is the ground return for the baseband section of the IC. The bypass and output capacitors connected
to VSSBB should have the shortest possible lead lengths. For best performance, connect VSSRF to
VSSBB at the power supply only (i.e., keep VSSBB currents from flowing through VSSRF return path).
Integrating capacitor for on-chip receive AGC (Automatic Gain Control). The Decay/Attack time-constant
(TC) ratio is nominally set as 10:1. Use of 0.47
μ
F or greater is strongly recommended for best range
performance. See
“Application Note 22, MICRF001 Theory of Operation”
for further information.
Programs desired Demodulator Filter Bandwidth. This pin in internally pulled-up to VDD. See Table 1.
This is the timing reference for on-chip tuning and alignment. Connect either a ceramic resonator or crystal
(mode dependent) between this pin and VSSBB, or drive the input with an AC coupled 0.5Vpp input clock.
Use ceramic resonators without integral capacitors.
4
ANT
5
VDDRF
6
VDDBB
7
CTH
8
DO
9/10
VSSBB
11
CAGC
12
13
SEL1
REFOSC
Note that if operated in FIXED mode, a crystal must be used; however in SWP mode, one may use either a
crystal or ceramic resonator. See
“Application Note 22, MICRF001 Theory of Operation”
for details on
frequency selection and accuracy.
This logic pin controls the operating mode of the MICRF011. When SWEN = HIGH, the MICRF011 is in
SWP mode. This is the normal (default) mode of the device. When SWEN = LOW, the device operates
as a conventional single-conversion superheterodyne receiver. (See
“Application Note 22, MICRF001
Theory of Operation”
for details.) This pin is internally pulled-up to VDD.
14
SWEN
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