- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383617 > MICRF011 (Micrel Semiconductor,Inc.) QwikRadiotm Receiver/Data Demodulator Preliminary Information PDF資料下載
參數(shù)資料
| 型號： | MICRF011 |
| 廠商： | Micrel Semiconductor,Inc. |
| 英文描述： | QwikRadiotm Receiver/Data Demodulator Preliminary Information |
| 中文描述： | QwikRadiotm接收器/解調(diào)器的初步數(shù)據(jù)信息 |
| 文件頁數(shù)： | 9/11頁 |
| 文件大?。?/td> | 147K |
| 代理商： | MICRF011 |
QwikRadio
tm
99
December 1998b
MICRF011
MICRF011
Micrel
3. Selecting CAGC Capacitor
Selection of CAGC is dictated by minimizing the ripple on
the AGC control voltage, by using a sufficiently large
capacitor. It is Micrel’s experience that CAGC should be in
the vicinity of 0.47
μ
F to 4.7
μ
F. Large capacitor values
should be carefully considered, as this determines the time
required for the AGC control voltage to settle from a
completely discharged condition. AGC settling time from a
completely discharged (0-volt) state is given approximately
by equation (6):
T = (1.333 * CAGC) – 0.44
(6)
where CAGC is in microfarads, and
T is in seconds.
I/O Pin Interface Circuitry
Interface circuitry for the various I/O pins of the MICRF011 is
shown in Figures 1 through 6. Specific information
regarding each of these circuits is discussed in the following
sub-paragraphs. Not shown are ESD protection diodes
which are applied to all input and output pins.
1. ANT Pin
The ANT pin is internally AC-coupled via a 3pF capacitor, to
an RF N-channel MOSFET, as shown in Figure 1.
Impedance on this pin to VSS is quite high at low
frequencies, and decreases as frequency increases. In the
UHF frequency range, the device input can be modeled as
6.3k
in parallel with 2pF (pin capacitance) shunt to
VSSRF.
2. CTH Pin
Figure 2 illustrates the CTH pin interface circuit. CTH pin is
driven from a P-channel MOSFET source-follower biased
with approximately 10μA of bias current. Transmission
gates TG1 and TG2 isolate the 6.9pF capacitor. Internal
control signals PHI1/PHI2 are related in a manner such that
the impedance across the transmission gates looks like a
“resistance” of approximately 118k
. The DC potential on
the CTH pin is approximately 1.6V.
3. CAGC Pin
Figure 3 illustrates the CAGC pin interface circuit. The AGC
control voltage is developed as an integrated current into a
capacitor CAGC. The attack current is nominally 15
μ
A,
while the decay current is a 1/10th scaling of this,
approximately 1.5
μ
A. Signal gain of the RF/IF strip inside
the IC diminishes as the voltage on CAGC decreases. By
simply adding a capacitor to CAGC pin, the attack/decay
time constant ratio is fixed at 1:10. Further discussion on
setting the attack time constant is found in
“Application Note
22, MICRF001 Theory of Operation”
, section 6.5.
Modification of the attack/decay ratio is possible by adding
resistance from CAGC pin either to VDDBB or VSSBB, as
desired.
4. DO Pin
The output stage for the Data Comparator (DO pin) is shown
in Figure 4. The output is a 10μA push-10μA pull, switched
current stage. Such an output stage is capable of driving
CMOS-type
loads.
An
recommended for driving high capacitance loads.
external
buffer-driver
is
5. REFOSC Pin
The REFOSC input circuit is shown in Figure 5. Input
impedance is quite high (200k
). This is a Colpitts
oscillator, with internal 30pF capacitors. This input is
intended to work with standard ceramic resonators,
connected from this pin to VSSBB, although a crystal may
be used instead, where greater frequency accuracy is
required. The resonators should not contain integral
capacitors, since these capacitors are contained inside the
IC. Externally applied signals should be AC-coupled,
amplitude limited to approximately 0.5Vpp. The nominal DC
bias voltage on this pin is 1.4V.
6. Control Inputs (SEL0, SEL1, SWEN)
Control input circuitry is shown in Figure 6. The standard
input is a logic inverter constructed with minimum geometry
MOSFETs (Q2, Q3). P-channel MOSFET Q1 is a large
channel length device which functions essentially as a
“weak” pullup to VDDBB. Typical pullup current is 5
μ
A,
leading to an impedance to the VDDBB supply of typically
1M
.
Figure 1 ANT Pin
相關PDF資料 |
PDF描述 |
|---|---|
| MICRF011BM | QwikRadiotm Receiver/Data Demodulator Preliminary Information |
| MICRF011BN | QwikRadiotm Receiver/Data Demodulator Preliminary Information |
| MICRF102 | QwikRadio UHF ASK Transmitter |
| MICRF102BM | QwikRadio UHF ASK Transmitter |
| MICRF103 | QwikRadio UHF ASK Transmitter |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MICRF011BM | 功能描述:IC RCVR/DATA DEMOD RF/IF 14SOIC RoHS:否 類別:RF/IF 和 RFID >> RF 接收器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 09/Jan/2012 標準包裝:50 系列:* 頻率:850MHz ~ 2.175GHz 靈敏度:- 數(shù)據(jù)傳輸率 - 最大:- 調(diào)制或協(xié)議:- 應用:* 電流 - 接收:* 數(shù)據(jù)接口:PCB，表面貼裝 存儲容量:- 天線連接器:PCB，表面貼裝 特點:- 電源電壓:4.75 V ~ 5.25 V 工作溫度:0°C ~ 85°C 封裝/外殼:40-WFQFN 裸露焊盤 供應商設備封裝:40-TQFN-EP（6x6） 包裝:托盤 |
| MICRF011BM TR | 功能描述:IC RCVR/DATAMOD300-440MHZ 14SOIC RoHS:否 類別:RF/IF 和 RFID >> RF 接收器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 09/Jan/2012 標準包裝:50 系列:* 頻率:850MHz ~ 2.175GHz 靈敏度:- 數(shù)據(jù)傳輸率 - 最大:- 調(diào)制或協(xié)議:- 應用:* 電流 - 接收:* 數(shù)據(jù)接口:PCB，表面貼裝 存儲容量:- 天線連接器:PCB，表面貼裝 特點:- 電源電壓:4.75 V ~ 5.25 V 工作溫度:0°C ~ 85°C 封裝/外殼:40-WFQFN 裸露焊盤 供應商設備封裝:40-TQFN-EP（6x6） 包裝:托盤 |
| MICRF011BN | 功能描述:IC RCVR/DATA DEMOD RF/IF 14DIP RoHS:否 類別:RF/IF 和 RFID >> RF 接收器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 09/Jan/2012 標準包裝:50 系列:* 頻率:850MHz ~ 2.175GHz 靈敏度:- 數(shù)據(jù)傳輸率 - 最大:- 調(diào)制或協(xié)議:- 應用:* 電流 - 接收:* 數(shù)據(jù)接口:PCB，表面貼裝 存儲容量:- 天線連接器:PCB，表面貼裝 特點:- 電源電壓:4.75 V ~ 5.25 V 工作溫度:0°C ~ 85°C 封裝/外殼:40-WFQFN 裸露焊盤 供應商設備封裝:40-TQFN-EP（6x6） 包裝:托盤 |
| MICRF011YM | 功能描述:射頻接收器 300-440MHz RF Receiver( Lead Free) RoHS:否 制造商:Skyworks Solutions, Inc. 類型:GPS Receiver 封裝 / 箱體:QFN-24 工作頻率:4.092 MHz 工作電源電壓:3.3 V 封裝:Reel |
| MICRF011YM TR | 功能描述:射頻接收器 300-440MHz RF Receiver( Lead Free) RoHS:否 制造商:Skyworks Solutions, Inc. 類型:GPS Receiver 封裝 / 箱體:QFN-24 工作頻率:4.092 MHz 工作電源電壓:3.3 V 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復。