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參數(shù)資料
| 型號： | MH1M144CXTJ-6 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | Microprocessor Development Tool; For Use With:EP7312; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No |
| 中文描述： | 快速頁面模式150994944位（1048576 - Word的144位）的動態(tài)隨機存儲器 |
| 文件頁數(shù)： | 6/14頁 |
| 文件大?。?/td> | 115K |
| 代理商： | MH1M144CXTJ-6 |
MH1M144CXTJ-6
FAST PAGE MODE 150994944-BIT (1048576-WORD BY 144-BIT)DYNAMIC RAM
MITSUBISHI LSIs
MITSUBISHI
ELECTRIC
( /14 )
6
Preliminary
Spec.
AC CHARACTERISTICS
(Ta=0 ~70 °C, Vcc=5.0V ± 5%, Vss=0V, unless otherwise noted , see notes 4,5,6)
Parameter
Access time from /RAS
Access time from /CAS
Access Time from Column Address
Access time from /CAS precharge
CAS to Output in Low Z
Symbol
t
RC
t
PC
t
RAC
t
CAC
t
AA
t
CPA
Unit
ns
ns
ns
ns
ns
ns
ns
Min
110
40
Max
t
CLZ
t
OFF
t
T
t
RP
Output Buffer Turn-Off Delay time
Transition Time(Rise And Fall)
/RAS Precharge Time
5
1
3
65
20
35
40
Note 4: VIH Min and VIL Max are reference levels for measuring timing of inputs signals.Also,transition times are measured between
VIH and VIL
5: An initial pause of 500us is required after power-up followed by 8 CBR cycles before proper device operation is achived.
6: AC measurements assume tT = 5ns.
7: Load = 2TTL loads and 100pF.
8: Operation within the tRCD Max limit insures that tRAC Max can be met.tRCD Max is specified as a reference point only.If tRCD
is greater than the specified tRCD Max limit,then access time is controlled by tCAC.
9: Operation within the tRAD Max limit insures that tRAC Max can be met.tRAD Max is specified as a reference point only.If tRAD
is greater than the specified tRAD Max limit,then access time is controlled by tAA.
10: tOFF Max defines the time at which the output achieves the open circuit conditon and is not referenced to VOH or VOL.
11: The tCRP requirement should be applicable for /RAS-/CAS cycles preceeded by any cycle.
12: Either tRRH or tRCH must be satisfied for a read cycle.
13: These parameters are referenced to the falling edge of /CAS for early write cycles.
Notes
Random Read or Write Cycle Time
Fast Page Mode Cycle Time
20
12
t
CAS
t
RCD
t
RAD
t
CRP
t
CP
t
ASR
t
RAH
t
ASC
t
RAS
t
RSH
t
CSH
t
CAH
t
AR
t
RAL
t
CAL
t
RCS
t
RCH
t
RRH
t
WCS
t
WCH
t
WP
t
RWL
t
CWL
t
DS
t
DH
t
DHR
t
REF
t
CSR
t
CHR
t
WCR
t
RPC
t
CPN
t
WRP
t
WRH
t
RHP
/CAS Hold Time
/CAS Pulse Width
/RAS to /CAS Delay Time
/RAS to Column Address Delay Time
/CAS to /RAS Precharge Time
/CAS Precharge Time
Row Address Setup Time
Row Address Hold Time
Column Address Setup Time
/RAS Pulse Width
/RAS Hold Time
Column Address Hold Time
Column Address Hold Time Ref to /RAS
Column Address Lead Time Ref to /RAS
Column Address Lead Time Ref to /CAS
Read Command Setup Time
Read Command Hold Time Ref to /CAS
Read Command Hold Time Ref to /RAS
Write Command Setup Time
Write Command Hold Time
Write Commnad Pulse Width
Write Command to /RAS Lead Time
Write Command to /CAS Lead Time
Data Setup Time
Data Hold Time
Data Hold Time Ref to /RAS
Refresh Period
/CAS Setup Time(CBR)
/CAS Hold Time(CBR)
Write Command Hold Time Ref to /RAS
/RAS to /CAS Precharge Time
/CAS Precharge Time(Non Page Mode)
/WE Setup(CBR Refresh)
/WE Hold(CBR Refresh)
Write to RAS Hold Time
7
7
7
10
4
60
18
60
20
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
10K
10K
43
30
15
10
10
0
10
0
8
9
11
15
50
30
30
0
0
10
0
45
15
15
15
0
20
45
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
ns
ns
ns
ns
ns
12
12
14
10
16.4
10
10
10
35
10
15
20
40
13
13
15
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