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參數(shù)資料
| 型號(hào)： | MH16V724AWJ-5 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | FAST PAGE MODE 1207959552 - BIT ( 16777216 - WORD BY 72 - BIT ) DYNAMIC RAM |
| 中文描述： | 快速頁(yè)面模式1207959552 -位（16777216 - Word的72 -位）動(dòng)態(tài)隨機(jī)存儲(chǔ)器 |
| 文件頁(yè)數(shù)： | 9/20頁(yè) |
| 文件大?。?/td> | 189K |
| 代理商： | MH16V724AWJ-5 |
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MITSUBISHI LSIs
MH16V724AWJ -5, -6
Preliminary Spec.
Specifications subject to
change without notice.
MITSUBISHI
ELECTRIC
( / 20 )
9
26/Feb./1997
FAST PAGE MODE 1207959552 - BIT ( 16777216 - WORD BY 72 - BIT ) DYNAMIC RAM
MIT-DS-0124-0.0
Fast Page Mode Cycle (Read, Early Write, Read -Write, Read-Modify-Write Cycle,) (Note 24)
Note 24: All previously specified timing requirements and switching characteristics are applicable to their respective fast page mode cycle.
≥
tCP(max),access time is controlled exclusively by tCAC.
Limits
Parameter
Symbol
Min
40
75
Max
(Note25)
(Note26)
15
102400
/CAS before /RAS Refresh Cycle (Note 27)
Limits
Parameter
Symbol
Unit
Min
10
10
Max
Note 27: Eight or more /CAS before /RAS cycles instead of eight /RAS cycles are necessary for proper operation of /CAS before /RAS refresh
-6
-6
Unit
ns
ns
ns
ns
ns
ns
tPC
tPRWC
tRAS
tCP
tCPRH
tCPWD
Fast page mode read/write cycle time
Fast page mode read write/read modify write cycle time
/RAS low pulse width for read write cycle
/CAS high pulse width
/RAS hold time after /CAS precharge
Delay time, /CAS precharge to W low
35
35
100
10
(Note23)
ns
ns
ns
ns
tCSR
tCHR
tRSR
tRHR
/CAS setup time before /RAS low
/CAS hold time after /RAS low
Read setup time before /RAS low
Read hold time after /RAS low
10
10
Min
35
70
Max
10
102400
-5
30
30
85
5
Min
Max
-5
5
10
10
10
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