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參數(shù)資料
| 型號： | MF820M-GMCAVXX |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 8/16-bit Data Bus Flash Memory Card |
| 中文描述： | 16位產(chǎn)品數(shù)據(jù)總線閃存卡 |
| 文件頁數(shù)： | 20/22頁 |
| 文件大?。?/td> | 148K |
| 代理商： | MF820M-GMCAVXX |
MITSUBISHI MEMORY CARD
FLASH MEMORY CARDS
MITSUBISHI
ELECTRIC
20/22
Feb.1999 Rev2.0
Note 12 : AC Test Conditions
Input pulse levels : V
IL
=0.4V, V
IH
=2.8V
Input pulse rise, fall time : t
r
=t
f
=10ns
Reference voltage
Input : V
IL
=0.8V, V
IH
=2.4V
Output : V
OL
=0.8V, V
OH
=2.0V
(ten and t
dis
are measured when output voltage is ± 500mV from steady state. )
Load : 100pF+ 1 TTL gate
5pF+ 1 TTL gate (at t
en
and t
dis
measuring)
13 : The data write is performed during the interval when both CE# and WE# are “L” level.
14 : Do not apply inverted phase signal externally when Dm pin is in output mode.
15 : CE# is indicated as follows:
Read A/Write A : CE#=CE1#=CE2#
Read B/Write B : CE#=CE1#, CE2#=“H” level
Read C/Write C : CE#=CE2#, CE1#=“H” level
16:
Indicates the don’t care input.
RECOMMENDED POWER UP/DOWN CONDITIONS
(Ta=0 to 55°C, unless otherwise noted)
Test conditions
Limits
Min.
0
V
CC
-0.1
V
IH
5.0
1.0
0.1
3.0
Max.
V
I
V
I
V
I
Unit
V
V
V
ms
μs
ms
ms
0V< V
CC
<2V
2V< V
CC
<
V
IH
V
IH
< V
CC
Vi(CE)
CE input voltage
t
su
(CE)
t
rec
(CE)
t
pr
(VCC)
t
pf
(VCC)
CE# setup time
CE# recovery time
V
CC
rise time
V
CC
fall time
300
300
POWER UP TIMING DIAGRAM
BLOCK PROGRAM/ERASE TIME
Limits
Typ.
1.1
0.5
Max.
10
2.1
Block erase time
Block program time
Note 17 : At Ta=25°C, Vcc=5V
Byte/word program time is about 8μs (typical), but not guaranteed.
s
s
Unit
Parameters
Insertion
0V
tpr(Vcc)
tsu(CE)
4.75V
0.9×V
CC
V
IH
2V
0.1×V
CC
V
CC
CE1#,CE2#
Withdraw
0V
tpr(Vcc)
tsu(CE)
4.75V
0.9×V
CC
V
IH
2V
0.1×V
CC
V
CC
CE1#,CE2#
Symbol
Parameter
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