參數(shù)資料
型號(hào)： MCP6004ESN
廠商： Microchip Technology Inc.
元件分類： FPGA
英文描述： 200000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN
中文描述： 1 MHz帶寬低功耗運(yùn)算放大器
文件頁(yè)數(shù)： 9/24頁(yè)
文件大?。?/td> 553K
代理商： MCP6004ESN
2003 Microchip Technology Inc.
DS21733D-page 9
MCP6001/2/4
3.6.3
PEAK DETECTOR
The MCP6001/2/4 op amp has a high input impedance,
rail-to-rail input and output and low input bias current,
which makes this device suitable for a peak detector
applications. Figure 3-7 shows a peak detector circuit
with clear and sample switches. The peak-detection
cycle uses a clock (CLK), as shown in Figure 3-7.
At the rising edge of CLK, Sample Switch closes to
begin sampling. The peak voltage stored on C
1
is sam-
pled to C
2
for a sample time defined by t
SAMP
. At the
end of the sample time (falling edge of Sample Signal),
Clear Signal goes high and closes the Clear Switch.
When the Clear Switch closes, C
1
discharges through
R
1
for a time defined by t
CLEAR
. At the end of the clear
time (falling edge of Clear Signal), op amp A begins to
store the peak value of V
IN
on C
1
for a time defined by
t
DETECT
.
In order to define the t
SAMP
and t
CLEAR
, it is necessary
to determine the capacitor charging and discharging
period. The capacitor charging time is limited by the
amplifier source current, while the discharging time (
τ
)
is defined using R
1
(
τ
= R
1
*C
1
). t
DETECT
is the time that
the input signal is sampled on C
1
, and is dependent on
the input voltage change frequency.
The op amp output current limit, and the size of the
storage capacitors (both C
1
and C
2
), could create slew-
ing limitations as the input voltage (V
IN
) increases. Cur-
rent through a capacitor is dependent on the size of the
capacitor and the rate of voltage change. From this
relationship, the rate of voltage change or the slew rate
can be determined. For example, with op amp short-cir-
cuit current of I
SC
= 25 mA and load capacitor of
C
1
= 0.1 μF, then:
EQUATION
This voltage change rate is less than the MCP6001/2/4
slew rate of 600 mV/μs. When the input voltage swings
below the voltage across C
1
, D
1
becomes reverse-
biased, which opens the feedback loop and rails the
amplifier. When the input voltage increases, the ampli-
fier recovers at its slew rate. Based on the rate of volt-
age change shown in the above equation, it takes an
extended period of time to charge a 0.1 μF capacitor.
The capacitors need to be selected so that the circuit is
not limited by the amplifier slew rate. Therefore, the
capacitors should be less than 40 μF and a stabilizing
resistor (R
ISO
) needs to be properly selected. Refer to
Section 3.3, “Capacitive Load and Stability”, for op amp
stability.
FIGURE 3-7:
Peak Detector with Clear and Sample CMOS Analog Switches.
dV
dt
------------
I
C
1
0.1
F
μ
s
-------
=
25mA
=
dV
dt
------------
250mV
=
I
SC
C
1
dV
dt
------------
×
=
V
IN
MCP6002
1/2
V
C1
MCP6002
–
1/2
D
1
A
B
V
OUT
MCP6001
–
C
C
2
Sample Signal
Clear Signal
Clear
Switch
R
ISO
Sample
Switch
–
+
+
+
CLK
t
SAMP
t
CLEAR
t
DETECT
R
1
R
ISO
V
C2
C
1
相關(guān)PDF資料
PDF描述
MCP6004EST 200000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN
MCP6004I 1 MHz Bandwidth Low Power Op Amp
MCP6004IMS 1 MHz Bandwidth Low Power Op Amp
MCP6004IOT 200000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MCP6004EST 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:1 MHz Bandwidth Low Power Op Amp
MCP6004I 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:1 MHz Bandwidth Low Power Op Amp
MCP6004-I/LT 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:1 MHz, Low-Power Op Amp
MCP6004-I/MS 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:1 MHz, Low-Power Op Amp
MCP6004-I/OT 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:1 MHz, Low-Power Op Amp
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