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參數(shù)資料
| 型號： | MCP6002EOT |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 1 MHz Bandwidth Low Power Op Amp |
| 中文描述： | 1 MHz帶寬低功耗運算放大器 |
| 文件頁數(shù)： | 7/24頁 |
| 文件大?。?/td> | 553K |
| 代理商： | MCP6002EOT |
2003 Microchip Technology Inc.
DS21733D-page 7
MCP6001/2/4
3.0
APPLICATION INFORMATION
The MCP6001/2/4 family of op amps is manufactured
using Microchip’s state-of-the-art CMOS process and
is specifically designed for low cost, low power and
general-purpose applications. The low supply voltage,
low quiescent current and wide bandwidth makes the
MCP6001/2/4 ideal for battery-powered applications.
This device has high phase margin, which makes it
stable for larger capacitive load applications.
3.1
Rail-to-Rail Input
The MCP6001/2/4 op amp is designed to prevent
phase reversal when the input pins exceed the supply
voltages. Figure 3-1 shows the input voltage exceeding
the supply voltage without any phase reversal.
FIGURE 3-1:
No Phase Reversal.
The MCP6001/2/4 Shows
The input stage of the MCP6001/2/4 op amp uses two
differential input stages in parallel; one operates at low
common mode input voltage (V
CM
) and the other at
high V
CM
. With this topology, the device operates with
V
CM
up to 300 mV above V
DD
and 300 mV below V
SS
.
The
Input
Offset
Voltage
V
CM
= V
SS
- 300 mV and V
DD
+ 300 mV to ensure
proper operation.
is
measured
at
Input voltages that exceed the input voltage range
(V
SS
- 0.3V to V
DD
+ 0.3V at 25°C) can cause exces-
sive current to flow into or out of the input pins. Current
beyond ±2 mA can cause reliability problems. Applica-
tions that exceed this rating must be externally limited
with a resistor, as shown in Figure 3-2.
FIGURE 3-2:
Resistor (R
IN
).
Input Current Limiting
3.2
Rail-to-Rail Output
The output voltage range of the MCP6001/2/4 op amp
is V
DD
- 25 mV (min.) and V
SS
+ 25 mV (max.) when
R
L
= 10 k
is connected to V
DD
/2 and V
DD
= 5.5V.
Refer to Figure 2-14 for more information.
3.3
Capacitive Loads
Driving large capacitive loads can cause stability prob-
lems for voltage feedback op amps. As the load capac-
itance increases, the feedback loop’s phase margin
decreases, and the closed loop bandwidth is reduced.
This produces gain peaking in the frequency response,
with overshoot and ringing in the step response. A unity
gain buffer (G = +1) is the most sensitive to capacitive
loads, but all gains show the same general behavior.
When driving large capacitive loads with these op
amps (e.g., > 100 pF when G = +1), a small series
resistor at the output (R
ISO
in Figure 3-3) improves the
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. It does not,
however, improve the bandwidth.
FIGURE 3-3:
stabilizes large capacitive loads.
Output resistor, R
ISO
To select R
ISO
, check the frequency response peaking
(or step response overshoot) on the bench (or with the
MCP6001/2/4 Spice macro model). If the response is
reasonable, you do not need R
ISO
. Otherwise, start
R
ISO
at 1 k
and modify its value until the response is
reasonable.
-1
0
1
2
3
4
5
6
0.E+00
1.E-05
2.E-05
3.E-05
4.E-05
5.E-05
6.E-05
7.E-05
8.E-05
9.E-05
1.E-04
Time (10 μs/div)
I
V
DD
= 5.0V
G = +2 V/V
V
IN
V
OUT
R
IN
V
---------–
Minimum expected V
2 mA
)
≥
R
IN
Maximum expected V
------------------------------------------------------------------------------
(
)
V
–
2 mA
≥
V
IN
R
IN
V
OUT
MCP600X
+
–
V
IN
R
ISO
V
OUT
MCP600X
+
C
L
–
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