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參數(shù)資料
| 型號： | MCP4725A3T-E/CH |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 9/50頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT EE W/I2C SOT23-6 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 設(shè)置時間： | 6µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | EEPROM，I²C，串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-6 |
| 供應(yīng)商設(shè)備封裝： | SOT-23-6 |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 輸出數(shù)目和類型： | 1 電壓，單極；1 電壓，雙極 |
| 采樣率（每秒）： | * |
| 產(chǎn)品目錄頁面： | 673 (CN2011-ZH PDF) |
| 配用： | MCP4725DM-PTPLS-ND - BOARD DAUGHTER PICTAIL MCP4725 |
| 其它名稱： | MCP4725A3T-E/CHDKR |
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2009 Microchip Technology Inc.
DS22039D-page 17
MCP4725
4.9
Offset Error Drift
Offset error drift is the variation in offset error due to a
change in ambient temperature. The offset error drift is
typically expressed in ppm/oC.
4.10
Settling Time
The Settling time is the time delay required for the DAC
output to settle to its new output value from the start of
code transition, within specified accuracy. In the
MCP4725, the settling time is a measure of the time
delay until the DAC output reaches its final value
(within 0.5 LSB) when the DAC code changes from
400h to C00h.
4.11
Major-Code Transition Glitch
Major-code transition glitch is the impulse energy
injected into the DAC analog output when the code in
the DAC register changes state. It is normally specified
as the area of the glitch in nV-Sec. and is measured
when the digital code is changed by 1 LSB at the major
carry transition (Example: 011...111 to 100... 000, or
100... 000 to 011 ... 111).
4.12
Digital Feedthrough
Digital feedthrough is the glitch that appears at the
analog output caused by coupling from the digital input
pins of the device. It is specified in nV-Sec. and is
measured with a full scale change on the digital input
pins (Example: 000... 000 to 111... 111, or 111... 111 to
000... 000). The digital feedthrough is measured when
the DAC is not being written to the register.
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