參數(shù)資料
型號(hào)： MCP4161-103E/P
廠商： Microchip Technology
文件頁(yè)數(shù)： 33/88頁(yè)
文件大?。?/td> 0K
描述： IC POT DGTL SNGL 10K SPI 8DIP
標(biāo)準(zhǔn)包裝： 60
系列： WiperLock™
接片： 257
電阻（歐姆）： 10k
電路數(shù)： 1
溫度系數(shù)： 標(biāo)準(zhǔn)值 150 ppm/°C
存儲(chǔ)器類(lèi)型： 易失
接口： 3 線 SPI（芯片選擇）
電源電壓： 1.8 V ~ 5.5 V
工作溫度： -40°C ~ 125°C
安裝類(lèi)型： 通孔
封裝/外殼： 8-DIP（0.300"，7.62mm）
供應(yīng)商設(shè)備封裝： 8-PDIP
包裝： 管件
產(chǎn)品目錄頁(yè)面： 675 (CN2011-ZH PDF)
2008 Microchip Technology Inc.
DS22059B-page 39
MCP414X/416X/424X/426X
6.0
SERIAL INTERFACE (SPI)
The MCP4XXX devices support the SPI serial protocol.
This SPI operates in the slave mode (does not
generate the serial clock).
The SPI interface uses up to four pins. These are:
CS - Chip Select
SCK - Serial Clock
SDI - Serial Data In
SDO - Serial Data Out
Typical SPI Interfaces are shown in Figure 6-1. In the
SPI interface, The Master’s Output pin is connected to
the Slave’s Input pin and the Master’s Input pin is
connected to the Slave’s Output pin.
The MCP4XXX SPI’s module supports two (of the four)
standard SPI modes. These are Mode 0,0 and 1,1.
The SPI mode is determined by the state of the SCK
pin (VIH or VIL) on the when the CS pin transitions from
inactive (VIH) to active (VIL or VIHH).
All SPI interface signals are high-voltage tolerant.
FIGURE 6-1:
Typical SPI Interface Block Diagram.
SDI/SDO
SDI
SDO
SDI
R1
(2)
MCP41X1
SCK
SDI
SDO
MCP4XXX
SDO
SDI
SCK
( Master Out - Slave In (MOSI) )
( Master In - Slave Out (MISO) )
Host
Controller
Host
Controller
Typical SPI Interface Connections
Typical MCP41X1 SPI Interface Connections (Host Controller Hardware SPI)
SDI/SDO
SDI
SDO
I/O
MCP41X1
I/O
SCK
Host
Controller
Alternate MCP41X1 SPI Interface Connections (Host Controller Firmware SPI)
(SDO/SDI)
(SCK)
CS
I/O (1)
CS
I/O (1)
CS
I/O (1)
Note 1:
If High voltage commands are desired, some type of external circuitry needs to be
implemented.
2:
R1 must be sized to ensure VIL and VIH of the devices are met.
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