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| 型號： | MCP2210T-I/MQ |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 67/82頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CONVERTER USB-PCI 20-QFN |
| 產(chǎn)品培訓(xùn)模塊： | MCP2210 Evaluation Kit |
| 標(biāo)準(zhǔn)包裝： | 3,300 |
| 應(yīng)用： | 帶 GPIO 的 USB 至 SPI 連接器 |
| 接口： | SPI，USB |
| 電源電壓： | 3.3 V ~ 5.5 V |
| 封裝/外殼： | 20-VQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 20-QFN（5x5） |
| 包裝： | 帶卷 (TR) |
| 安裝類型： | 表面貼裝 |
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2011 Microchip Technology Inc.
DS22288A-page 7
MCP2210
1.6
GP Module
The GP module features nine I/O lines.
1.6.1
CONFIGURABLE PIN FUNCTIONS
The pins can be configured as:
GPIO – individually configurable, general purpose
input or output
Chip Select pins – used by the SPI module
Alternate function pins – used for miscellaneous
features such as:
- SSPND – USB Suspend and Resume states
- USBCFG – indicates USB configuration
status
-LOWPWR – signals when the host does not
accept the requirements (presented during
enumeration) and the chip is not configured.
In this mode, the whole system powered from
the USB host should draw up to 100 mA.
- External Interrupt Input – used to count
external events
- SPI bus Release Request – used to request
SPI bus access from the MCP2210
- SPI bus Release Acknowledge – used to
acknowledge when the MCP2210 has
released the SPI bus
- LED – indicates SPI traffic led
1.6.1.1
GPIO Pins Function
The GP pins (if enabled for GPIO functionality) can be
used as digital inputs/outputs.
These pins can be read (both inputs and outputs) and
written (only the outputs).
1.6.1.2
Chip Select Pins Function
The GP pins (if enabled for the Chip Select functional-
ity) are controlled by the SPI module. Their Idle/Active
value is determined by the SPI transfer parameters.
1.6.1.3
SSPND Pin Function
The GP2 pin (if enabled for this functionality) reflects
the USB state (Suspend/Resume). The pin is active
‘low’ when the Suspend state has been issued by the
USB host.
Likewise, the pin drives ‘high’ after the Resume state is
achieved.
This pin allows the application to go into Low-Power
mode when USB communication is suspended, and
switches to a full active state when USB activity is
resumed.
1.6.1.4
USBCFG Pin Function
The GP5 pin (if enabled for this functionality) starts out
‘high’ during power-up or after Reset, and goes ‘low’
after the device successfully configures to the USB.
The pin will go ‘high’ when in Suspend mode and ‘low’
when the USB resumes.
1.6.1.5
LOWPWR Pin Function
The GP4 pin (if enabled for this functionality) starts out
‘low’ during power-up or after Reset, and goes ‘high’
after the device successfully configures to the USB.
The pin will go ‘low’ when in Suspend mode and ‘high’
when the USB resumes.
1.6.1.6
External Interrupt Input Pin Function
The GP4 pin (if enabled for this functionality) is used as
an interrupt input pin and it will count interrupt events
such as:
Falling edges
Rising edges
Low-logic pulses
High-logic pulses
1.6.1.7
SPI Bus Release Request Pin
Function
The GP8 pin (if enabled for this functionality) is used by
an external device to request the MCP2210 to release
the SPI bus. This way, more than one SPI master can
have access to the SPI slave chips on the bus. When
this pin is driven ‘low’, the MCP2210 will examine the
request and, based on the conditions and internal logic,
it might release the SPI bus. If there is an ongoing SPI
transfer taking place at the moment when an external
device requests the bus, MCP2210 will release it after
the transfer is completed or if the USB host cancels the
current SPI transfer.
1.6.1.8
SPI Bus Release Acknowledge Pin
Function
The GP7 pin (if enabled for this functionality) is used by
the MCP2210 to signal back if the SPI bus was
released. When a SPI bus release request is registered
by the MCP2210, based on the condition and internal
logic, the chip might release the bus. The bus is
released immediately if there is no SPI transfer taking
place, or it will do so after the current SPI transfer is
finished or cancelled by the USB host.
1.6.1.9
LED Pin Function
The GP3 pin (if enabled for this functionality) is used as
an SPI traffic indication. When an SPI transfer is taking
place (active state for this pin), this pin will be driven
‘low’. When there is no SPI traffic taking place, the pin
is in its inactive state or logic ‘high’.
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