參數(shù)資料
型號： MCP1631RD-DCPC1
廠商： Microchip Technology
文件頁數(shù)： 8/44頁
文件大?。?/td> 0K
描述： REF DES BATT CHARG OR LED DRIVER
標準包裝： 1
電流 - 輸出 / 通道： 700mA
輸出及類型： 1，非隔離
特點： 用于鋰離子、鎳氫和鎳鎘電池充電器的固件
輸入電壓： 3.5 ~ 16 V
已供物品： 板
已用 IC / 零件： MCP1631HV，PIC16F616
產(chǎn)品目錄頁面： 668 (CN2011-ZH PDF)
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PIC16F610/616/16HV610/616
DS41288F-page 16
2009 Microchip Technology Inc.
TABLE 2-1:
PIC16F610/616/16HV610/616 SPECIAL FUNCTION REGISTERS SUMMARY BANK 0
Addr
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Page
Bank 0
00h
INDF
Addressing this location uses contents of FSR to address data memory (not a physical register)
xxxx xxxx
01h
TMR0
Timer0 Module’s Register
xxxx xxxx
02h
PCL
Program Counter’s (PC) Least Significant Byte
0000 0000
03h
STATUS
IRP(1)
RP1(1)
RP0
TO
PD
ZDC
C
0001 1xxx
04h
FSR
Indirect Data Memory Address Pointer
xxxx xxxx
05h
PORTA
—
RA5
RA4
RA3
RA2
RA1
RA0
--x0 x000
06h
—
Unimplemented
—
07h
PORTC
—
RC5
RC4
RC3
RC2
RC1
RC0
--xx 00xx
08h
—
Unimplemented
—
09h
—
Unimplemented
—
0Ah
PCLATH
—
Write Buffer for upper 5 bits of Program Counter
---0 0000
0Bh
INTCON
GIE
PEIE
T0IE
INTE
RAIE
T0IF
INTF
RAIF
0000 0000
0Ch
PIR1
—ADIF(2)
CCP1IF(2)
C2IF
C1IF
—TMR2IF(2)
TMR1IF
-000 0-00
0Dh
—
Unimplemented
—
0Eh
TMR1L
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
xxxx xxxx
0Fh
TMR1H
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
xxxx xxxx
10h
T1CON
T1GINV
TMR1GE
T1CKPS1
T1CKPS0
T1OSCEN
T1SYNC
TMR1CS
TMR1ON
0000 0000
11h
TMR2(2)
Timer2 Module Register
0000 0000
12h
T2CON(2)
—
TOUTPS3
TOUTPS2
TOUTPS1
TOUTPS0
TMR2ON
T2CKPS1
T2CKPS0 -000 0000
13h
CCPR1L(2)
Capture/Compare/PWM Register 1 Low Byte
xxxx xxxx
14h
CCPR1H(2)
Capture/Compare/PWM Register 1 High Byte
xxxx xxxx
15h
CCP1CON(2)
P1M1
P1M0
DC1B1
DC1B0
CCP1M3
CCP1M2
CCP1M1
CCP1M0
0000 0000
16h
PWM1CON(2)
PRSEN
PDC6
PDC5
PDC4
PDC3
PDC2
PDC1
PDC0
0000 0000
17h
ECCPAS(2)
ECCPASE
ECCPAS2
ECCPAS1
ECCPAS0
PSSAC1
PSSAC0
PSSBD1
PSSBD0
0000 0000
18h
—
Unimplemented
—
19h
VRCON
C1VREN
C2VREN
VRR
FVREN
VR3
VR2
VR1
VR0
0000 0000
1Ah
CM1CON0
C1ON
C1OUT
C1OE
C1POL
—
C1R
C1CH1
C1CH0
0000 -000
1Bh
CM2CON0
C2ON
C2OUT
C2OE
C2POL
—
C2R
C2CH1
C2CH0
0000 -000
1Ch
CM2CON1
MC1OUT
MC2OUT
—
T1ACS
C1HYS
C2HYS
T1GSS
C2SYNC
00-0 0010
1Dh
—
Unimplemented
—
1Eh
ADRESH(2,3)
Most Significant 8 bits of the left shifted A/D result or 2 bits of right shifted result
xxxx xxxx
1Fh
ADCON0(2)
ADFM
VCFG
CHS3
CHS2
CHS1
CHS0
GO/DONE
ADON
0000 0000
Legend:
– = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented
Note
1:
IRP and RP1 bits are reserved, always maintain these bits clear.
2:
PIC16F616/16HV616 only.
3:
Read-only register.
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