參數(shù)資料
型號: MCF5481CZP166
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 166.66 MHz, RISC PROCESSOR, PBGA388
封裝: 27 X 27 MM, 1 MM PITCH, PLASTIC, MS-034AAL-1, BGA-388
文件頁數(shù): 39/96頁
文件大?。?/td> 2006K
代理商: MCF5481CZP166
44
MCF548x Integrated Microprocessor Hardware Specifications
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Chip Configuration
— FlexBus uses AD[31:0] as multiplexed address and data bus
— FlexBus uses AD[31:0] as non-multiplexed data bus and PCIAD[31:0] as non-multiplexed
address bus
Byte enable mode
—BE[3:0] can assert during reads and writes
—BWE[3:0] can only assert during writes
Clock mode:
— 1:1 SDCLK to CLKIN ratio
— 2:1 SDCLK to CLKIN ratio
1.6.2
Chip Configuration Pins
Table 12 shows the pins that are sampled at reset time to configure the MCF548x.
1.6.3
Chip Configuration Circuit
Figure 2 shows a block diagram of the recommended circuit used to drive the reset configuration values for
the MCF548x.The signals are sampled at the rising clock edge immediately before RSTI negates, so the
signals must be stable and valid at this time.
Table 12. Configuration Pin Descriptions
Pin
Chip Configuration
Function
Pin State/Meaning
AD[12:8]
PLL Clock
Configuration
AD5
Byte Strobe/Size
Configuration
0
Byte Strobe outputs driven
1
Size and Address outputs driven
AD4
FlexBus Operating
Mode
0
AD[31:0] used for multiplexed
address and data
1
AD[31:0] used for data,
PCIAD[31:0] used for address
AD3
Byte Enable
Configuration
0
BE[3:0] can assert on both read
and write cycles
1
BWE[3:0] can only assert on write
cycles
AD2
FBCS0 Boot Chip
Select Auto
Acknowledge
Configuration
0
Auto acknowledge disabled
1
Auto acknowledge enabled with 63
wait states
AD[1:0]
FBCS0 Boot Chip
Select Port Size
Configuration
00
32-bit port
01
8-bit port
1X
16-bit port
MTMOD0 1
1
The MTMOD0 pin should not be changed during normal operation.
BDM/JTAG Select
0
BDM mode
1
JTAG mode
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