參數(shù)資料
型號: MCF52232AF50
廠商: Freescale Semiconductor
文件頁數(shù): 18/55頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 128K FLASH 80-LQFP
標(biāo)準(zhǔn)包裝: 90
系列: MCF5223x
核心處理器: Coldfire V2
芯體尺寸: 32-位
速度: 50MHz
連通性: 以太網(wǎng),I²C,SPI,UART/USART
外圍設(shè)備: DMA,LVD,POR,PWM,WDT
輸入/輸出數(shù): 56
程序存儲器容量: 128KB(128K x 8)
程序存儲器類型: 閃存
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b
振蕩器型: 內(nèi)部
工作溫度: 0°C ~ 70°C
封裝/外殼: 80-LQFP
包裝: 托盤
MCF52235 Family Configurations
MCF52235 ColdFire Microcontroller Data Sheet, Rev. 10
Freescale Semiconductor
25
1.12
ADC Signals
Table 13 describes the signals of the Analog-to-Digital Converter.
1.13
General Purpose Timer Signals
Table 14 describes the General Purpose Timer Signals.
1.14
Pulse Width Modulator Signals
Table 15 describes the PWM signals.
1.15
Debug Support Signals
These signals are used as the interface to the on-chip JTAG controller and also to interface to the BDM logic.
Table 13. ADC Signals
Signal Name
Abbreviation
Function
I/O
Analog Inputs
AN[7:0]
Inputs to the A-to-D converter.
I
Analog Reference
VRH
Reference voltage high and low inputs.
I
VRL
I
Analog Supply
VDDA
Isolate the ADC circuitry from power supply noise
VSSA
Table 14. GPT Signals
Signal Name
Abbreviation
Function
I/O
General Purpose Timer
Input/Output
GPT[3:0]
Inputs to or outputs from the general purppose timer module
I/O
Table 15. PWM Signals
Signal Name
Abbreviation
Function
I/O
PWM Output Channels
PWM[7:0]
Pulse width modulated output for PWM channels
O
Table 16. Debug Support Signals
Signal Name
Abbreviation
Function
I/O
JTAG Enable
JTAG_EN
Select between debug module and JTAG signals at reset
I
Test Reset
TRST
This active-low signal is used to initialize the JTAG logic
asynchronously.
I
Test Clock
TCLK
Used to synchronize the JTAG logic.
I
Test Mode Select
TMS
Used to sequence the JTAG state machine. TMS is sampled on the
rising edge of TCLK.
I
Test Data Input
TDI
Serial input for test instructions and data. TDI is sampled on the rising
edge of TCLK.
I
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