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TABLE OF CONTENTS (Continued)
Paragraph
Page
Number
Title
Number
MOTOROLA
USERS MANUAL
v
6.2.3
Transfer Start (TS) .....................................................................6-2
6.2.4
Read/Write (R/W) .......................................................................6-2
6.2.5
Size (SIZ[1:0]) ............................................................................6-2
6.2.6
Transfer Type (TT[1:0]) ..............................................................6-2
6.2.7
Access Type and Mode (ATM) ...................................................6-3
6.2.8
Asynchronous Transfer Acknowledge (ATA) .............................6-3
6.2.9
Transfer Acknowledge (TA) ........................................................6-4
6.2.10
Transfer Error Acknowledge (TEA) ............................................6-4
6.3
Bus Exceptions .....................................................................................6-5
6.3.1
Double Bus Fault ........................................................................6-5
6.4
Bus Characteristics ..............................................................................6-5
6.5
Data Transfer Mechanism ....................................................................6-6
6.5.1
Bus Sizing ..................................................................................6-7
6.5.2
Bursting Read Transfers: Word, Longword, and Line ..............6-15
6.5.3
Bursting Write Transfers: Word, Longword, and Line ..............6-18
6.5.4
Burst-Inhibited Read Transfer: Word, Longword, and Line ......6-21
6.5.5
Burst-Inhibited Write Transfer: Word, Longword, and Line ......6-24
6.5.6
Asynchronous-Acknowledge Read Transfer ............................6-27
6.5.7
Asynchronous Acknowledge Write Transfer ............................6-30
6.5.8
Bursting Read Transfers with Asynchronous Acknowledge .....6-32
6.5.9
Bursting Write Transfers with Asynchronous Acknowledge .....6-35
6.5.10
Burst-Inhibited Read Transfers with Async. Acknowledge .......6-39
6.5.11
Burst-Inhibited Write Transfers with Async. Acknowledge .......6-42
6.5.12
Termination Tied to GND .........................................................6-45
6.6
Misaligned Operands .........................................................................6-46
6.7
Acknowledge Cycles ..........................................................................6-47
6.7.1
Interrupt Acknowledge Cycle ....................................................6-48
6.8
Bus Errors ..........................................................................................6-51
6.9
Bus Arbitration ....................................................................................6-53
6.9.1
Two Master Bus Arbitration Protocol (Two-Wire Mode) ...........6-53
6.9.2
External Bus Master Arbitration Protocol (Three-Wire Mode) ...6-61
6.10
Alternate Bus Master Operation .........................................................6-67
6.10.1
Alternate Master Read Transfer (MCF5206 Termination) .........6-68
6.10.2
Alternate Master Write Transfer (MCF5206 Termination) .........6-71
6.10.3
Alternate Master Bursting Read (MCF5206 Termination) ........6-73
6.10.4
Alternate Master Bursting Write (MCF5206 Termination) .........6-76
6.11
Reset Operation .................................................................................6-80
6.11.1
Master Reset ............................................................................6-80
6.11.2
Normal Reset ...........................................................................6-82
6.11.3
Software Watchdog Timer Reset Operation .............................6-83
Section 7
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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