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Chapter 8 256 KByte Flash Module (S12XFTM256K2XFV1)
MC9S12XF - Family Reference Manual, Rev.1.20
Freescale Semiconductor
235
8.3.2.2
Flash Security Register (FSEC)
The FSEC register holds all bits associated with the security of the MCU and Flash module.
All bits in the FSEC register are readable but not writable.
During the reset sequence, the FSEC register is loaded with the contents of the Flash security byte in the
Flash configuration field at global address 0x7F_FF0F located in P-Flash memory (see
Table 8-3) as
indicated by reset condition F in
Figure 8-6. If a double bit fault is detected while reading the P-Flash
phrase containing the Flash security byte during the reset sequence, all bits in the FSEC register will be
set to leave the Flash module in a secured state with backdoor key access disabled.
2. FDIV shown generates an FCLK frequency of 1.05 MHz
Offset Module Base + 0x0001
76543210
R
KEYEN[1:0]
RNV[5:2]
SEC[1:0]
W
Reset
F
FFFFFF
= Unimplemented or Reserved
Figure 8-6. Flash Security Register (FSEC)
Table 8-10. FSEC Field Descriptions
Field
Description
7–6
KEYEN[1:0]
Backdoor Key Security Enable Bits — The KEYEN[1:0] bits dene the enabling of backdoor key access to the
5–2
RNV[5:2}
Reserved Nonvolatile Bits — The RNV bits should remain in the erased state for future enhancements.
1–0
SEC[1:0]
Flash Security Bits — The SEC[1:0] bits dene the security state of the MCU as shown in
Table 8-12. If the
Flash module is unsecured using backdoor key access, the SEC bits are forced to 10.
Table 8-11. Flash KEYEN States
KEYEN[1:0]
Status of Backdoor Key Access
00
DISABLED
01
DISABLED(1)
1. Preferred KEYEN state to disable backdoor key access.
10
ENABLED
11
DISABLED